esd保護設計研討會(英文)(編輯修改稿)
2025-02-13 10:54 本頁面
【文章內容簡介】 No implied equivalence in test severity between the two test methodsCalifornia Micro Devices 2023/3/4 下午 01:54:38 13IEC 100042 Bench Test SpecificationCalifornia Micro Devices 2023/3/4 下午 01:54:38 14ESD Protection Techniques4 Clamp diodes in IC Not sufficient protection 4 Shielding Low effectiveness4 Bypass capacitor or series resistor/inductor Can degrade signal。 many ponents。 large board area 4 Spark gap Low cost。 low stability。 large board area4 Discrete Zener diodes High capacitance, many ponents。 large board area4 Discrete PN diodes Low capacitance。 many ponents。 large board area 4 Integrated PN diodesCalifornia Micro Devices 2023/3/4 下午 01:54:38 15Integrated Diode Networks4 Superior downstream ESD protection High speed response ESD current steered to GND or VCC4 Minimum Signal Degradation (Low C)4 Minimal board space, weight4 Low assembly/manufacturing costs4 Minimal DesignIn Time4 Longterm reliabilityCalifornia Micro Devices 2023/3/4 下午 01:54:38 16Choosing an ESD Diode Network4 How many lines are needed? 4 How much capacitance? (. 5 pF)4 What is the HBM rating? (. 177。15 kV)4 What is the downstream clamp voltage? (. 13 V 15 kV HBM pulse)4 What is the contact discharge rating? (. 177。8 kV)4 What is the air discharge rating? (. 177。15 kV)4 What package? (. 24pin QSOP)California Micro Devices 2023/3/4 下午 01:54:38 17ESD Diode Network Placemen
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