【正文】 HZ : OUT STD_LOGIC。 CLK500HZ : OUT STD_LOGIC )。END COMPONENT。COMPONENT conv PORT(clk : IN STD_LOGIC。 in16 : IN STD_LOGIC_VECTOR(15 DOWNTO 0)。 out1 : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)。 out2 : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)。 out3 : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)。 out4 : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) )。END COMPONENT。SIGNAL CLK1HZ : STD_LOGIC。SIGNAL CLK500HZ : STD_LOGIC。SIGNAL en0 : STD_LOGIC。SIGNAL en1 : STD_LOGIC。SIGNAL en2 : STD_LOGIC。SIGNAL fei_bcd : STD_LOGIC_VECTOR(15 DOWNTO 0)。SIGNAL flag : STD_LOGIC。SIGNAL flag_3_9 : STD_LOGIC。SIGNAL flag_9 : STD_LOGIC。SIGNAL glbai : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL glge : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL glshi : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL hour_h : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL hour_l : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL jibai : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL jige : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL jijiao : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL jishi : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL min_h : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL min_l : STD_LOGIC_VECTOR(3 DOWNTO 0)。SIGNAL PUL : STD_LOGIC。SIGNAL sf_out : STD_LOGIC_VECTOR(7 DOWNTO 0)。SIGNAL START : STD_LOGIC。SIGNAL t : STD_LOGIC。BEGIN b2v_inst : glPORT MAP(CLK_50M = CLK_50M, CP = CP, START = START, PUL = PUL, RESET = SYS_RESET, flag_3k = en0, flag_3_9k = en1, flag_9k = en2, flag_3_9km = flag_3_9, flag_9km = flag_9, glbai = glbai, glge = glge, glshi = glshi)。b2v_inst1 : ram_1602PORT MAP(clk_50M = CLK_50M, reset = SYS_RESET, glbai = glbai, glge = glge, glshi = glshi, hour_h = hour_h, hour_l = hour_l, jfbai = jibai, jfge = jige, jfjiao = jijiao, jfshi = jishi, min_h = min_h, min_l = min_l, sf_h = sf_out(7 DOWNTO 4), sf_l = sf_out(3 DOWNTO 0), lcd_rs = lcd_rs, lcd_rw = lcd_rw, lcd_e = lcd_e, data = data)。b2v_inst2 : dendaiGENERIC MAP(time_wait = 00000010 )PORT MAP(CLK_1HZ = CLK1HZ, CLK_500HZ = CLK500HZ, START = START, PUL = PUL, flag = flag, ff = t, hour_h = hour_h, hour_l = hour_l, min_h = min_h, min_l = min_l)。b2v_inst3 : sfGENERIC MAP(fei0 = 00000000000000000000000000000000, fei1 = 00000000000000010000000100010000, fei2 = 00000000000100000000000100000000, fei3 = 00000000000000000001000000000000 )PORT MAP(en0 = en0, en1 = en1, en2 = en2, t = t, sf_out = sf_out)。b2v_inst4 : moneyGENERIC MAP(fei_10km = 0000000000000000000000000000000000000000000000010001000000000000, fei_base = 0000000000000000000000000000000000000001000000010000000000000000, fei_over3km = 0000000000000000000000000000000000000000000000010000000000000000, fei_wait = 0000000000000000000000000000000000000000000000000001000000000000 )PORT MAP(flag = flag, flag_3_9km = flag_3_9, flag_9km = flag_9, RESET = SYS_RESET, fei_bcd = fei_bcd)。b2v_inst5 : key_setPORT MAP(clock_50M = CLK_50M, key = KEY, START = START, PUL = PUL, motoa = motoa, motob = motob)。b2v_inst6 : int_divGENERIC MAP(N1 = 50000000, N2 = 100000 )PORT MAP(CLK_50M = CLK_50M, CLK1HZ = CLK1HZ, CLK500HZ = CLK500HZ)。b2v_inst7 : convPORT MAP(clk = CLK500HZ, in16 = fei_bcd, out1 = jijiao, out2 = jige, out3 = jishi, out4 = jibai)。END bdf_type。 LCD1602液晶顯示模塊（）變量位置 hour_h hour_l : min_h min_l s y : jfbai jfshi jfge . jfjiao sf_h . sf_l / k m k m : glbai glshi glgelibrary ieee。use 。use 。use 。entity ram_1602 is port( jfbai,jfshi,jfge,jfjiao:in integer range 0 to 10。 計費百、十，元、角 hour_h,hour_l,min_h,min_l:in integer range 0 to 10。 暫停時間的分鐘位，秒位 sf_h,sf_l:in integer range 0 to 10。 按照不同的公里數(shù)，單價不一樣 glbai,glshi,glge:in integer range 0 to 10。 公里數(shù)（） clk_50M:in std_logic。 50MHz 系統(tǒng)時鐘50MHz reset:in std_logic。 系統(tǒng)復位 lcd_rs:out std_logic。 液晶顯示的RS端 lcd_rw:out std_logic。 液晶顯示的RW端 lcd_e:buffer std_logic。 液晶顯示的全能端 data:out std_logic_vector(7 downto 0) 液晶顯示的數(shù)據(jù)羰 )。end ram_1602。architecture behave of ram_1602 is signal lcd1_1,lcd1_2,lcd1_3,lcd1_4,lcd1_5,lcd1_6,lcd1_7,lcd1_8:std_logic_vector(7 downto 0)。 signal lcd2_1,lcd2_2,lcd2_3,lcd2_4,lcd2_5:std_logic_vector(7 downto 0)。 signal t:std_logic_vector(19 downto 0)。 signal clk_500Hz:std_logic。type state is( SETFUNCTION,SWITCHMODE,CLEAR,SETDDRAM_0,S0_1,SETDDRAM_1,S0_2,SETDDRAM_2,S0_3,SETDDRAM_3,S0_4,S0_5,S0_6,S0_7,S0_8,SETDDRAM_2_0,SETDDRAM_2_1, S1_0,SETDDRAM_2_2,S1_1,SETDDRAM_2_3,S1_2,SETDDRAM_2_4,S1_3,S1_4,S1_5,S1_6,S1_7,S1_8,S1_9,S1_10,SETDATA_1_1,S1_D_1,S1_D_2,SETDATA_1_3,S1_D_3,S1_D_4,SETDATA_1_5,S1_D_5,S1_D_6,S1_D_7,SETDATA_1_6,S1_D_8,SETDATA_2_1,S2_D_1,SETDATA_2_2,S2_D_3,SETDATA_2_3,S2_D_4,S2_D_5,SETDATA_2_4,S2_D_6 )。signal current_s:state。beginclk:process(clk_50M) 提供掃描信號500HZ begin if clk_50M39。event and clk_50M=39。139。 then if t10000 then t=(others=39。039。)。 clk_500Hz=39。039。 elsif t5000 then clk_500Hz=39。139。 t=t+1。 else t=t+1。 end if。 end if。 end process。p1: process(jfbai,jfshi,jfge,jfjiao,min_h,min_l,hour_h,hour_l,sf_h,sf_l,glbai,glshi,glge,clk_500Hz) begin 譯碼 case jfbai is when 0=lcd1_5=x30。 when 1=lcd1_5=x31。 when 2=lcd1_5=x32。 whe