【正文】 ency of a highfrequency clock is one way to reduce jitter. With frequency division, the same amount of jitter occurs within a longer period, reducing its percentage of system time. In general, to reduce essential sources of jitter and avoid introducing additional sources, one should use a stable reference clock, avoid using signals and circuits that slew slowly, and use the highest feasible reference frequency to allow increased oversampling. SpuriousFree Dynamic Range (SFDR) refers to the ratio (measured in decibels) between the highest level of the fundamental signal and the highest level of any spurious, signal—including aliases and harmonically related frequency ponents—in the spectrum. For the very best SFDR, it is essential to begin with a highquality oscillator. SFDR is an important specification in an application where the frequency spectrum is being shared with other munication channels and applications. If a transmitter’s output sends spurious signals into other frequency bands, they can corrupt, or interrupt neighboring signals. Typical output plots taken from an AD9834 (10bit DDS) with a 50MHz master clock are shown in Figure10. In (a), the output frequency is exactly 1/3 of the master clock frequency (MCLK). Because of the judicious choice of frequencies, there are no harmonic frequencies in the 25MHz window, aliases are minimized, and the spurious behavior appears excellent, with all spurs at least 80 dB below the signal (SFDR = 80 dB). The lower frequency setting in (b) has more points to shape the waveform (but not enough for a really clean waveform), and gives a more realistic picture。 the largest spur, at the secondharmonic frequency, is about 50 dB below the signal (SFDR = 50 dB).(a) fOUT = (b) fOUT = .Figure 10. Output of an AD9834 with a 50MHz master clockFigure 11. Screen presentation provided by an interactive design tool.A sinx/x presentation of a typical device output.Do you have tools that make it easier to program and predict the performance of the DDS?The online interactive design tool is an assistant for selecting tuning words, given a reference clock and desired output frequencies and/or phases. The required frequency is chosen, and idealized output harmonics are shown after an external reconstruction filter has been applied. An example is shown in Figure 11. Tabular data is also provided for the major images and harmonics.How will these tools help me program the DDS?Figure 12. Typical display of programming sequence.All that’s needed is the required frequency output and the system’s reference clock frequency. The design tool will output the full programming sequence required to program the part. In the example in Figure 12, the MCLK is set to 25 MHz and the desired output frequency is set to 10MHz. Once the update button is pressed, the full programming sequence to program the part is contained in the Init Sequence register.How can I evaluate your DDS devices?All DDS devices have an evaluation board available for purchase. They e with dedicated software, allowing the user to test/evaluate the part easily within minutes of receiving the board. A technical note acpanying each evaluation board contains schematic information and shows best remended boarddesign and layout practice.WAVEFORM GENERATORS Basic Priciple of Sinusoidal Oscillators Many different circuit configurations deliver an essentially sinusoidal output waveform even without inputsignal excitation. The basic principles governing all these oscillators are investigated. In addition to determining the conditions required for oscillation to take place, the frequency and amplitude stability are also studied. show an amplifier, a feedback network, and an input mixing circuit not yet connected to form a closed loop. The amplifier provides an output signal as a consequence of the signal applied directly to the amplifier input terminal. The output of the feedback network is and the output lf the mixing circuit (which is now simply an inverter) is Form the loop gain is Loop gain= An amplifier with transfer gain A and feedback network F not yet connected to form a closed loop.Suppose it should happen that matters are adjusted in such a way that the signalis identically equal to the externally applied input signal. Since the amplifier has no means of distinguishing the source of the input signal applied to it, it would appear that, if the external source were removed and if terminal 2 were connected to terminal 1, the amplifier would continue to provide the same output signal as before. Note, of course, that the statement =means that the instantaneous values of andare exactly equal at all times. The condition=is equivalent to, or the loop gain must equal unity.The Barkhausen Criterion We assume in this discussion of oscillators that the entire circuit operates linearly and that the amplifier or feedback network or both contain reactive elements. Under such circumstances, the only periodic waveform which will preserve, its form is the sinusoid. For a sinusoidal waveform the conditionis equivalent to the condition that the amplitude, phase, and frequency ofandbe identical. Since the phase shift introduced in a signal in being transmitted through a reactive network is invariably a function of the frequency, we have the following important principle:The frequency at which a sinusoidal oscillator will operate is the frequency for which the total shift introduced, as a signal proceed from the input terminals, through the amplifier and feedback network, and back again to the input, is precisely zero(or, of course, an integral multiple of 2). Stated more simply, the frequency of a sinusoidal oscillator is determined by the condition that the loopgain phase shift is zero.Although other principles may be formulated which may serve equally to determine the frequency, these other principles may alwa