【正文】 裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessASIC Application Specific Integrated Circuit 專用集成電路 9U5h6z$C+c半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessATE Automatic Test Equipment 自動(dòng)監(jiān)測(cè)設(shè)備 c(q8ZV7g3s M*z(DAU Gold 金 。\)r3n6| O/n半導(dǎo)體技術(shù)天地)a(ZM/O9ABCB Benzocyclohutene,Benzo Cyclo Butene 苯丙環(huán)丁烯 1o。@6K。I$ZU。sBEO Beryllium Oxide 氧化鈹 半導(dǎo)體技術(shù)天地)u)|+\5A)g。oBIST BuiltIn SelfTest(Function) 內(nèi)建自測(cè)試(功能) 6HS+R8s%oBIT Bipolar Transistor 雙極晶體管 。mi8I。\,C2v半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessBTAB Bumped Tape Automated Bonding 凸點(diǎn)載帶自動(dòng)焊 :~)s5Pf5c6{BGA Ball Grid Array 焊球陣列 /_%z3?!39。[ u1f半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessBQFP Quad Flat Package With Bumper 帶緩沖墊的四邊引腳扁平封裝 7w$~%G/I7]z半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fabless半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessX%w1S \5`C4 Controlled Collapsed Chip Connection 可控塌陷芯片連接 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fabless4Y(R5r9\.B*k7[9b:@1{.bamp。a2_CAD Computer Aided Design 計(jì)算機(jī)輔助設(shè)計(jì) 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fabless7j8Jb8} S0~amp。@CBGA Ceramic Ball Grid Array 陶瓷焊球陣列 !|0G3N L,ramp。?39。 Ceramic Column Grid Array 陶瓷焊柱陣列 半導(dǎo)體技術(shù)天地}0G6R4y%T:Ur6zCLCC Ceramic Leaded Chip Carrier 帶引腳的陶瓷片式載體 [9t%S E+i2t3GrH?CML Current Mode Logic 電流開關(guān)邏輯 半導(dǎo)體技術(shù)天地5G*n/V8r*O2m7^%)^CMOS Complementary MetalOxideSemiconductor 互補(bǔ)金屬氧化物半導(dǎo)體 ,k39。D6n,pamp。c8F%W半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessCOB Chip on Board 板上芯片 半導(dǎo)體技術(shù)天地amp。P9{6`9x${B,A。oCOC Chip on Chip 疊層芯片 $x3b7G39。f+p(L)RL半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fablessCOG Chip on Glass 玻璃板上芯片 *pf1Y/:e)GCSP Chip Size Package 芯片尺寸封裝 %a%Z!hl8|*ZH1x半導(dǎo)體技術(shù)天地CTE Coefficient of Thermal Expansion 熱膨脹系數(shù) +ZCVD Chemical Vapor Depositon 化學(xué)汽相淀積 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fabless%I39。o39。x1cK半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fabless!j7@+?)} h%F:RDCA Direct Chip Attach 芯片直接安裝 5y4i$E/`G+l%`DFP Dual Flat Package 雙側(cè)引腳扁平封裝 *z39。O4](f1b*qDIP Double InLine Package 雙列直插式封裝 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fabless!vamp。U9_39。k/\DMS Direct Metallization System 直接金屬化系統(tǒng) 半導(dǎo)體技術(shù)天地5w+Qamp。C,_,@1rDRAM Dynamic Random Access Memory 動(dòng)態(tài)隨機(jī)存取存貯器 .{/C$xGq Bamp。NQDSO Dual Small Outline 雙側(cè)引腳小外形封裝 }。_。B2}c9R_/i。q9yDTCP Dual Tape Carrier Package 雙載帶封裝 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fabless @.h4|1`+D。h:d5A/Y3D ThreeDimensional 三維 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fabless2W。H0R+m7_%h0jn2D TwoDimensional 二維 *Wamp。s(F2R,Z1D!F8MEB Electron Beam 電子束 半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fabless D9s7H4z!|39。s7\)u。w+fECL EmitterCoupled Logic 射極耦合邏輯 半導(dǎo)體,芯片,集EPI外延FC Flip Chip 倒裝片法 半導(dǎo)體技術(shù)天地+o$O(P+V7O5S,CFCB Flip Chip Bonding 倒裝焊 $k7Z5h*k(p%M5jFCOB Flip Chip on Board 板上倒裝片 半導(dǎo)體技術(shù)天地,p1K!V)\9[1d9Q2D(vFEM Finite Element Method 有限元法 $U。W,Jb6{}6aFP Flat Package 扁平封裝 (E,[1s+lFPBGA Fine Pitch Ball Grid Array 窄節(jié)距BGA !Q(a${!FPD Fine Pitch Device 窄節(jié)距器件 ?(_!I*c6I1x39。I8U)T3I半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fablessFPPQFP Fine Pitch Plastic QFP 窄節(jié)距塑料QFP `!l)Tamp。R0_。c0]9dGQFP GuardRing Quad Flat Package 帶保護(hù)環(huán)的QFP ?(_3A%V6}}半導(dǎo)體技術(shù)天地(^T7]8w*W1]/E4B39。KHDI High Density Interconnect 高密度互連 。I%t8h%n!V6y9bHDMI High Density Multilayer Interconnect 高密度多層互連 %{9V1I39。u4w+o+ Hybird Integrated Circuit 混合集成電路 半導(dǎo)體技術(shù)天地。K+MO*@HTCC High Temperature CoFired Ceramic 高溫共燒陶瓷 %o5V(]4G!CHTS High Temperature Storage 高溫貯存 4n:E2y!C*}8\6W(t$K7Z4Z,R半導(dǎo)體技術(shù)天地IC Integrated Circuit 集成電路 g39。k2kX!y Insulated Gate Bipolar Transistor 絕緣柵雙極晶體管 半導(dǎo)體技術(shù)天地39。C39。Vq0Q([ILB InnerLead Bond 內(nèi)引腳焊接 8eamp。^*~z+]+?amp。oI/O Input/Output 輸入/輸出 $~ M9h0?+^IVH Inner Via Hole 內(nèi)部通孔 :H+t!g%P4Q)E(pJLCC JLeaded Chip Carrier J形引腳片式載體 2~5q1\8e:~,X0m半導(dǎo)體技術(shù)天地KGD Known Good Die 優(yōu)質(zhì)芯片 )m。amp。q8X8L+!(z,~5^%z2M半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,晶圓,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,fabrication,process,layout,package,test,FA,RA,QA,photo,etch,implant,diffustion,lithography,fab,fablessLCC Leadless Chip Carrier 無引腳片式載體 ,S3E5Fo8E6N/F半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer,chip,ic,design,eda,process,layout,package,FA,QA,diffusion,etch,photo,implant,metal,cmp,lithography,fab,fablessLCCC Leadless Ceramic Chip Carrier 無引腳陶瓷片式載體 7l6R)_6|。]半導(dǎo)體,芯片,集成電路,設(shè)計(jì),版圖,芯片,制造,工藝,制程,封裝,測(cè)試,wafer