【正文】 tions between the FPGA Control functions in conjunction with the external circuit, the design of the FPGAbased DDS waveform generator. This system is mainly to FPGA chip EP2C8Q208C8 as the core, supplemented by the necessary analogcircuit, in the preparation of the Verilog programming, constitutes a Based on Direct Digital Synthesis technology wave generator. Key words: FPGA。本系統(tǒng)主要以FPGA芯片EP2C8Q208C8 為核心，輔以必要的模擬電路，在Verilog編寫的程序控制下，構成了一個基于直接數(shù)字頻率合成技術的波形發(fā)生器。本論文報告為基于FPGA 的DDS 波形發(fā)生器，具有一定的實際意義。摘 要信號發(fā)生器作為電子技術領域中最基本的電子儀器，廣泛應用于各個領域中。隨著電子信息技術的發(fā)展，對其性能的要求也越來越高，如要求頻率穩(wěn)定性高、轉(zhuǎn)換速度快，具有調(diào)幅、調(diào)頻、調(diào)相等功能。通過研究直接數(shù)字頻率合成器（Direct Digital Frequency Synthesis 簡稱DDS或DDFS）的基本原理，掌握了DDS 的核心相位累加器的功能；分析了FPGA 的性能結(jié)構，了解到DA轉(zhuǎn)換電路與FPGA 之間的通信控制功能；結(jié)合外圍電路，設計了基于FPGA 的DDS 波形發(fā)生器。關鍵詞：FPGA； DDS；波形發(fā)生器；Verilog。 DDS。 Verilog 目錄摘 要................................................................................................................................IAbstract...............................................................................................................................I第一章 緒論.....................................................................................................................1 引言.....................................................................................................................1 國內(nèi)外現(xiàn)狀.........................................................................................................1 國外信號發(fā)生器現(xiàn)狀...............................................................................1 國外信號發(fā)生器現(xiàn)狀................................................................................2 DDS的優(yōu)劣勢......................................................................................................3 DDS的優(yōu)點...............................................................................................3 DDS的缺點...............................................................................................3 單芯片DDS介紹......................................................................................4 本論文主要內(nèi)容..................................................................................................4第二章 FPGA工作原理...................................................................................................6 FPGA 簡介...........................................................................................................6 FPGA的發(fā)展歷程及特性介紹................................................................６ FPGA系統(tǒng)結(jié)構和資源............................................................................６ FPGA的設計流程......................................................................................9 FPGA實現(xiàn)DDS的方法.......................................................................................11 基于IIR濾波器的DDS.............................................................................11 基于查表法（LTU）的DDS....................................................................13 兩種實現(xiàn)方法的比較.................................................................................17第三章 DDS工作原理.....................................................................................................18 DDS理論可行性....................................................................................................18 直接數(shù)字頻率合成基礎........................................................................................19 DDS的頻率分析...................................................................................................20 DDS輸出特性.......................................................................................................22 理想情況下的DDS頻譜特性.....................................................................22 非理想情況下的DDS頻譜特性.................................................................24 DDS系統(tǒng)輸出的雜散信號抑制方法...................................................................25 增加波形存儲器的有效容量.......................................................................25 抖動注入技術...............................................................................................25第四章 系統(tǒng)方案及電路設計.........................................................................................27 系統(tǒng)設計目標.......................................................................................................27 主要器件的選擇...................................................................................................27 FPGA主芯片的選擇....................................................................................27 DAC的選擇..................................................................................................28 系統(tǒng)構成...............................................................................................................29 FPGA的設計.........................................................................................................29 系統(tǒng)控制模塊的設計...................................................................................29 按鍵消抖模塊設計.......................................................................................33 顯示模塊設計...............................................................................................34 頻率顯示模塊的設計............................................................................34 電壓幅值顯示模塊的設計....................................................................36 外圍接口電路...............................................................................................36第五章 調(diào)試....................................................................................................................37第六章 性能結(jié)果測試及分析........................................................................................37 測試數(shù)據(jù)................................................................................................................38