tft制造原理和流程(ppt72頁)(參考版)
2025-01-20 00:08本頁面
【正文】 缺陷分析 Module工藝流程及設(shè)備 Aging老化爐 功能 :動態(tài) /靜態(tài)下的產(chǎn)品老化 Module工藝流程及設(shè)備 Thank you !!! SHANGHAI TIANMA MICROELECTRONICS CO.,LTD. ?演講完畢，謝謝觀看！ 。 WET簡介 各工藝單元功能 ARRAY工藝流程及設(shè)備 WET簡介 工程概念圖 ARRAY工藝流程及設(shè)備 光阻剝膜 DEY簡介 —干刻 ARRAY工藝流程及設(shè)備 DEY簡介 —設(shè)備原理 ARRAY工藝流程及設(shè)備 壓力控制 氣體供給 控制臺 除害裝置 （ scrubber） 汽缸 cabi Gas box 上部 電極 氣體吹出 ＲＦ 電源 （ＰＥ 場合 ） 下部 電極 APC閥 泵 流量 控制 RF power 壓力檢 出 真 空排 氣 特氣對應(yīng) ＭＦＣ ＭＦＣ ＭＦＣ APC 控制 C/M 控制 C/M 等離子體 工藝腔體 M. Box DEY簡介 —工程示意圖 ARRAY工藝流程及設(shè)備 PHOTO曝光顯影蝕刻基本概念 ARRAY工藝流程及設(shè)備 PHOTO顯影 PHOTO顯影 ARRAY工藝流程及設(shè)備 ARRAY工藝流程及設(shè)備 TEST – AOI(ADIAEI) – Auto optical inspection configuration 自動光學(xué)檢查 ARRAY工藝流程及設(shè)備 ← 2160mm → ← 2400mm → 3GB44unit=132GB G８ Size The CCD sensor detect the substrate, Image by the process unit. Defect can be reviewed precisely CCD探測產(chǎn)品表面 ,生成的圖象通過處理單元 ,缺陷會精確的反映出來 . AOI – Auto optical inspection configuration 自動光學(xué)檢查設(shè)備 圖形處理單元 ARRAY工藝流程及設(shè)備 O/S test design ? Panel structure for O/S Test ? Every data line extands ? out of the active area connect with O/S pad ? On the other side all data line connected together by Shorting bar ARRAY工藝流程及設(shè)備 Array Tester ? Test station ? Electrical cabi ? Operator console ? Environmental Enclosure ARRAY工藝流程及設(shè)備 Array tester Array tester Using instructions in the selected processing recipe, the pattern generator sends test signals to the probe frame. The illuminator is turned on, a bias voltage applied to the modulator and an image captured by the CCD camera. The image is sent to the image processing puter (IPPC) and panel flaws are identified and stored in the defect file by the Sun host puter. Array tester optical part Light from the illuminator is reflected by the modulator and the image captured on the CCD camera. The image is then processed and analyzed for defects. TESTTEG TESTER TESTTEG Measurement Structure Measurement Structure TEST Array laser repair TEST Array laser conf
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