【正文】 2td From the details of the measuring accuracy of this method depends on the td, and its direct impact on the stability and size of the uncertainty of measurement. Therefore, the application of methods, counters can be achieved within the entire frequency range, such as the accuracy of measurement, and measurement accuracy is significantly improved, measuring improvement in resolution to ns, and the elimination of the word 177。1107/s. When the measurement and quantification of delay circuit with short intervals bined, the uncertainty of measurement can be derived from the following. In the use of cycle synchronization, multianalyte Tx for the cycle value of T0 time base for the introduction of the cycle. Tx= NT0+△t1△t2 Delay circuit and quantitative bined: Tx= NT0+(N1N2)td177。 t1 quantify delay devices for the delay delay unit volume ( ns). In this way, using multicycle synchronization and realized the gate and measured signal synchronization。 n1 for a short period of time at Δ t1 corresponding delay the number of modules。 a word error this fundamental issue, but these methods equipment plex and not conducive to the promotion. To obtain high precision, fast response time, simple structure and the frequency and time measurement method is relatively difficult. Judging from the structure as simple as possible at the same time take into account the point of view of accuracy, multicycle synchronization and delay based on the quantitative methods in a short period of time interval measurement, achieved within the scope of broadband, such as highresolution measurement accuracy. Quantified by measuring short time intervals Delay Photoelectric signal can be in a certain stability in the medium of rapid spread, and in different media have different delay. By signals generated by the delay to quantify, and gave a short period of time interval measurement. The basic principle is that delay serial, parallel count, and different from the traditional counter serial number, that is, to signal through a series of delay unit, the delay unit on the delay stability, under the control of the puter Delay on the state of highspeed acquisition and data processing, for a short period of time to achieve accurate measurement interval. Delay quantitative thinking depend on the realization of the delay stability delay unit, the unit depends on the resolution of the delay time delay element. Delay device as a unit can be passive conduit, or other active devices gate circuit. Among them, Traverse shorter delay time (nearly the speed of light transmission delay), the gate delay time longer. Taking into account delays can be predictive ability final choice of the CPLD devices, the realization of the short time interval measurement. Will be the beginning of a short time interval signal sent delay in the transmission chain, when the advent of the end of signal, this signal delay in the delay in the chain latch state, read through the CPU, the judge signal a delay unit on the few shortterm time interval can be the size of the unit decided to delay resolution of the unit delay time. Generally speaking, in order to measure both short interval, the use of two modules delay and latches, but in reality, given the time software gate large enough to allow pletion from the number of CPU operation, which can be measured in the time interval taken before the end of a short period of time at Δ t1 corresponding delay the number of units through the control signals must be used only a delay and latches units, it saves CPLD internal resources. Synchronization and multicycle latency to quantify the method of bining The formula is: T=n0t0+n1t1n2t1 On, n0 for the filling pulse of value。 a word error, mainly because of the actual gate edge and standard frequency synchronization is not filling pulse edge Tx=N0T0△t2+△t1, if accurately measured short interval Δ t1 and Δ t2, will be able to accurately measure time intervals Tx, eliminating 177。 to obtain nine needed 100 seconds gate, followed by an