【正文】 設(shè)計(jì)中根據(jù)系統(tǒng)的功能要求合理劃分出層次，進(jìn)行分級(jí)設(shè)計(jì)和仿真驗(yàn)證，將較為復(fù)雜的數(shù)字系統(tǒng)邏輯簡(jiǎn)化為基本的模型從而降低實(shí)現(xiàn)的難度。實(shí)現(xiàn)了包含基本時(shí)分秒、年月日、日程提醒、農(nóng)歷顯示、傳統(tǒng)節(jié)假日提醒、鬧鈴閏年閏月提醒等多功能的電子鐘。 [關(guān)鍵字 ] 硬件描述語(yǔ)言 VHDL、 Synopsys、 Modelsim、低功耗、版圖繪制 基于 Synopsys的多功能時(shí)鐘芯片的設(shè)計(jì) II The design of the multifunction clock chip based on Synopsys Abstract： This design in order to reduce the cost of electronic clock, reduce the area and volume electronic clock, integrated more personalized features, then based on the hardware description language VHDL or Verilog HDL based on EDA design method, to design a new type of electronic clock. Based on the function of the system in the design of reasonable divided into layers, for hierarchical design and simulation, to simplify the plex number system logic as a basic model to reduce the difficulty of implementation. With design method of hierarchical, topdown design, the different function modules together, finally the process using Modelsim simulation software and the design of the integrated software synopsys platform to pile the simulation, the resulting table the electric work, through the work table circuit map electronic clock chip layout. Implements contains basic split second, when (date) (month) (year), reminders, leap year lunar calendar display, traditional festivals remind, alarm leap month remind and other multifunction electronic clock. The process involves the plete process of EDA design, can be easily by changing the add or delete, applied to various kinds of related systems. Key words: VHDL hardware description language, Synopsys, Modelsim, low power consumption, map drawing 目錄 III 目錄 引言 ............................................................................................................................................. 1 第一章 : Synopsys簡(jiǎn)介 ................................................................................................................ 2 Synopsys的簡(jiǎn)單工作原理 ............................................................................................... 2 Synopsys的應(yīng)用 ............................................................................................................. 2 第二章： Design Compiler 和 Modelsim 簡(jiǎn)介 .................................................................................. 3 Design Compiler介紹 .................................................................................................. 3 Modelsim 介紹 ............................................................................................................... 4 第三章 時(shí)鐘芯片設(shè)計(jì)方案 ............................................................................................................ 7 多功能時(shí)鐘的設(shè)計(jì)指標(biāo) ................................................................................................... 7 基于 Modelsim對(duì)多功能時(shí)鐘芯片的設(shè)計(jì)方案 .................................................................. 7 第四章 時(shí)鐘芯片各模塊的設(shè)計(jì)及仿真 .................................................. 9 設(shè)計(jì)原理 ........................................................................................................................ 9 基本顯示功能 ................................................................................................................10 秒鐘模塊 ...........................................................................................................10 分鐘模塊 .............................................................................................................12 時(shí)鐘模塊 .............................................................................................................13 日模塊 ................................................................................................................15 月模塊 ................................................................................................................17 年模塊 ................................................................................................................18 陰陽(yáng)歷顯示 .........................................................................................................20 提醒功能 .......................................................................................................................20 .......................................................................................................20 節(jié)假日提醒 .........................................................................................................21 日程提醒 .............................................................................................................22 時(shí)間校對(duì)功能 ................................................................................................................23 鬧鈴功能 .......................................................................................................................24 第五章 電路網(wǎng)表和版圖 ............................................................ 26 總電路仿真圖 ................................................................................................................26 總電路網(wǎng)表 ....................................................................................................................26 多功能時(shí)鐘芯片版圖 ......................................................................................................27 總結(jié) ............................................................................................................................................29 致謝語(yǔ) ........................................................................... 30 參考文獻(xiàn) ......................................................................... 31 附錄 ............................................................................................................................................32 引言 1 引言 Synopsys 公司是一家主導(dǎo)于為集成電路設(shè)計(jì)方面供應(yīng)電子設(shè)計(jì)自動(dòng)化軟件（ EDA）工具的企