集成電路工藝和版圖設(shè)計(jì)參考-文庫吧資料
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【正文】 000 每立方米空氣中含灰塵的個(gè)數(shù) 去離子水 氧化 擴(kuò)散 注入 光刻 ……………. 2022/2/4 Jian Fang 5 生產(chǎn)工廠簡介 PSI 2022/2/4 Jian Fang 6 Fab Two was pleted January 2, 1996 and is a State of the Art facility. This 2,200 square foot facility was constructed using all the latest materials and technologies. In this set of cleanrooms we change the air 390 times per hour, if you do the math with ULPA filtration this is a Class One facility. We have had it tested and it does meet Class One parameters (without any people working in it). Since we are not making microprocessors here and we don39。 12??300mm。2022/2/4 Jian Fang 1 集成電路工藝和版圖設(shè)計(jì) 概述 Jian Fang IC Design Center, UESTC 2022/2/4 Jian Fang 2 微電子制造工藝 2022/2/4 Jian Fang 3 IC常用術(shù)語 園片：硅片 芯片 (Chip, Die)： 6?、 8 ?：硅（園）片直徑： 1 ?＝ 6??150mm。 8??200mm。 亞微米 1?m的設(shè)計(jì)規(guī)范 深亞微米 = ?m的設(shè)計(jì)規(guī)范 ?m 、 ?m －設(shè)計(jì)規(guī)范（最小特征尺寸） 布線層數(shù)：金屬（摻雜多晶硅）連線的層數(shù)。t want to wear space suits, we run it as a class 10 fab. Even though it consistently runs well below Class Ten. 2022/2/4 Jian Fang 7 Here in the Fab Two Photolithography area we see one of our 200mm .35 micron ILine Steppers. this stepper can image and align both 6 amp。s first 300mm wet process cassettes (that can be spin rinse dried). 2022/2/4 Jian Fang 10 As we look in this window we see the World39。s first production 300mm Nitride system! We began processing 300mm LPCVD Silicon Nitride in May of 1997. 2022/2/4 Jian Fang 13 2,500 additional square feet of State of the Art Class One Cleanroom is currently processing wafers! With increased 300mm amp。 300mm wafers. We can even process the two sizes in the same furnace load without suffering any uniformity problems! (Thermal Oxide Only) 2022/2/4 Jian Fang 15 Accuracy in metrology is never an issue at Process Specialties. We use the most advanced robotic laser ellipsometers and other calibrated tools for precision thin film, resistivity, CD and step height measurement. Including our new Nanometrics 8300 full wafer 300mm thin film measurement and mapping tool. We also use outside laboratories and our excellent working relationships with our Metrology tool customers, for additional correlation and calibration. 2022/2/4 Jian Fang 16 One of two SEM Labs located in our facility. In this one we are using a field emission tool for everything from looking at photoresist profiles and measuring CD39。 半導(dǎo)體 IC 雙極 IC MOSIC BiCMOS PMOS IC CMOS IC NMOS IC 2022/2/4 Jian Fang 20 MOS IC及工藝 MOSFET — Metal Oxide Semiconductor Field Effect Transistor . — 金屬氧化物半導(dǎo)體場效應(yīng)晶體管 Si 金屬 氧化物（絕緣層、 SiO2） 半導(dǎo)體 MOS(MIS)結(jié)構(gòu) 2022/2/4 Jian Fang 21 P－襯底 n+ n+ 漏 源 柵 柵氧化層 氧化層 溝道 G D S VT VGS ID VDS 0 反型層 溝道 源（ Source） S 漏（ Drain） D 柵（ Gate） G 柵氧化層厚度： 50埃－ 1000埃（ 5nm－ 100nm） VT－閾值電壓 電壓控制 N溝 MOS（ NMOS） ? P型襯底，受主雜質(zhì)； ? 柵上加正電壓，表面吸引電子，反型，電子通道； ? 漏加正電壓，電子從源區(qū)經(jīng) N溝道到達(dá)漏區(qū)，器件開通 。 2022/2/4 Jian Fang 23 CMOS ? CMOS： Complementary Symmetry Metal Oxide Semiconductor
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