【正文】 s feedback input. The function of the PLL is to pare the distributed clock to the ining reference clock, and vary the phase and frequency of its output until the reference and feedback clocks are phase and frequency matched.PLLs are ubiquitous—they tune clocks in systems several feet across, as well as clocks in small portions of individual chips. Sometimes the reference clock may not actually be a pure clock at all, but rather a data stream with enough transitions that the PLL is able to recover a regular clock from that stream. Sometimes the reference clock is the same frequenc。MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple gigahertz and the reference crystal is just tens or hundreds of megahertz.Spread spectrumAll electronic systems emit some unwanted radio frequency energy. Various regulatory agencies (such as the FCC in the United States) put limits on the emitted energy and any interference caused by it. The emitted noise generally appears at sharp spectral peaks (usually at the operating frequency of the device, and a few harmonics). A system designer can use a spreadspectrum PLL to reduce interference with highQ receivers by spreading the energy over a larger portion of the spectrum. For example, by changing the operating frequency up and down by a small amount (about 1%), a device running at hundreds of megahertz can spread its interference evenly over a few megahertz of spectrum, which drastically reduces the amount of noise seen on broadcast FM radio channels, which have a bandwidth of several tens of kilohertz.Clock distributionTypically, the reference clock enters the chip and drives a phase locked loop (PLL), which then drives the system39。 in space munications for coherent demodulation and threshold extension, bit synchronization, and symbol synchronization. Phaselocked loops can also be used to demodulate frequencymodulated signals. In radio transmitters, a PLL is used to synthesize new frequencies which are a multiple of a reference frequency, with the same stability as the reference frequency.Other applications include:˙Demodulation of both FM and AM signals˙Recovery of small signals that otherwise would be lost in noise (lockin amplifier)˙Recovery of clock timing information from a data stream such as from a disk drive˙Clock multipliers in microprocessors that allow internal processor elements to run faster than external connections, while maintaining precise timing relationships˙DTMF decoders, modems, and other tone decoders, for remote control and telemunicationsClock recoverySome data streams, especially highspeed serial data streams (such as the raw stream of data from the magnetic head of a disk drive), are sent without an acpanying clock. The receiver generates a clock from an approximate frequency reference, and then phasealigns to the transitions in the data stream with a PLL. This process is referred to as clock recovery. In order for this scheme to work, the data stream must have a transition frequently enough to correct any drift in the PLL39。s notion of a second would agree with the reference time (within the wall clock39。s too close to the pace car, he will slow down. The result is all the race cars lock on to the phase of the pace car. The cars travel around the track in a tight group that is a small fraction of a lap.Clock analogyPhase can be proportional to time, so a phase difference can be a time difference. Clocks are, with varying degrees of accuracy, phaselocked (timelocked) to a master clock.Left on its own, each clock will mark time at slightly different rates. A wall clock, for example, might be fast by a few seconds per hour pared to the reference clock at NIST. Over time, that time difference would bee substantial.To keep his clock in synch, each week the owner pares the time on his wall clock to a more accurate clock (a phase parison), and he resets his clock. Left alone, the wall clock will continue to diverge from the reference clock at the same few seconds per hour rate.Some clocks have a timing adjustment (a fastslow control). When the owner pared his wall clock39。 effectively creating onchip “pockets” where noise and power supply parameters are carefully controlled.On top of its protection skills, the deep trench technology also helps to minimize die area by allowing dense packing of highvoltage analog pockets with lowvoltage regions. You can obtain improvements in die area of 10 to 60 percent over designs that use standard junction isolation techniques.As mentioned earlier, the reason that system designers are using deep submicron technologies in those markets is often linked to the availability of devices in those technologies, not the plexity of the application itself. The plexity can be handled in many cases by an 8bit microcontroller, or 32bit for highend applications. Products such as the ?181。Bridging the Gap between the Analog and Digital WorldsMost applications require the coexistence of analog and digital functionality, and the benefits of bining this functionality on a single chip are significant. Such mixedsignal integration, however, also presents significant challenges. Furthermore, digital and analog developments tend to evolve at differing rates, yet mixedsignal solutions for markets such as industrial, automotive and medical, must remain available over significant time periods. The latest mixedsignal semiconductor processes are helping to address some of these issues, and this article will look at some of the issues designers should consider when specifying integrated mixedsignal solutions.Mixedsignal solution for the real worldSystem designers often partition the digital portion from the analog section of a given design for a variety of reasons: the availability of mixing ponents for the two technologies, the plexity of the digital de