燕山大學(xué)eda課程設(shè)計(jì)電子日歷-資料下載頁
2025-10-16 12:26本頁面
【正文】 high 4 bit reg [3:0] hour_L。//hour low 4 bit reg [3:0] hour_H。//hour high 4 bit reg [23:0] key_time。//press key away shake reg key_mode_n。//press key_mode next state reg key_change_n。//press key_change next state reg key_turn_n。//press key_turn next state wire key_mode_press。//sure Button press key_mode wire key_turn_press。//sure button press key_turn wire key_change_press。//sure button press key_changealways @(posedge sysclk)key_mode_n always @(posedge sysclk or negedge rst_b)begin if(!rst_b)key_time key_time endreg [1:0] mode_num。//key mode..0Timing clock function always @(posedge sysclk or negedge rst_b)begin if(!rst_b)mode_num mode_num always @(*)begin if(mode_num == 239。h1)beginmin = init_alarm_min。hour = init_alarm_hour。end else beginmin = {min_H,min_L}。hour = {hour_H,hour_L}。end endreg fm。//choose turn hour or minute always @(posedge sysclk or negedge rst_b)begin if(!rst_b)fm fm reg [27:0] time_t。///count time reg [27:0] time_t_n。//count time next state always @(posedge sysclk or negedge rst_b)begin if(!rst_b)time_t always @(*)begin if(time_t == Count_1s)time_t_n reg [3:0] sec_L。//second low 4 bit reg [3:0] sec_H。//second high 4 bit wire sec_cb。//second carry bit signal assign sec_cb =(sec_L == 439。h9)amp。amp。(sec_H == 439。h5)。always @(posedge sysclk or negedge rst_b)begin if(!rst_b)beginsec_L sec_L sec_L sec_L wire min_cb。//minute carry bit signal assign min_cb =(min_L == 439。h9)amp。amp。(min_H == 439。h5)。always @(posedge sysclk or negedge rst_b)begin if(!rst_b)beginmin_L min_L min_L min_L min_L = min_L + 439。h1。else if((fm)amp。amp。(mode_num == 239。h2)amp。amp。(key_change_press)amp。amp。(key_time ==2439。h0)amp。amp。(min_L == 439。h9)amp。amp。(min_H!=439。h5))beginmin_L = 439。h0。min_H = min_H + 439。h1。end else if((fm)amp。amp。(mode_num == 239。h2)amp。amp。(key_change_press)amp。amp。(key_time == 2439。h0)amp。amp。(min_L == 439。h9)amp。amp。(min_H ==439。h5))beginmin_L = 439。h0。min_H = 439。h0。end endalways @(posedge sysclk or negedge rst_b)begin if(!rst_b)beginhour_L hour_L hour_L hour_L hour_L hour_L hour_L hour_L 2439。h0)amp。amp。(hour_L == 439。h3)amp。amp。(hour_H ==439。h2))beginhour_L wire buzzer_en。assign buzzer_en =(init_alarm_min == {min_H,min_L})amp。amp。(init_alarm_hour == {hour_H,hour_L})。led_tube I_led_tube(.sysclk(sysclk),.rst_b(rst_b),.scan_time(2439。h1F090),.data0({139。h1,sec_L}),.data1({139。h1,sec_H}),.data2({139。h1,439。hA}),.data3({139。h1,min[3:0]}),.data4({139。h1,min[7:4]}),.data5({139。h1,439。hA}),.data6({139。h1,hour[3:0]}),.data7({139。h1,hour[7:4]}),.led_data(led_data),.led_sel(led_sel))。buzzer I_buzzer(.sysclk(sysclk),.rst_b(rst_b),.buzzer_en(buzzer_en),.buzzer(buzzer))。endmodule
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