fpga功耗優(yōu)化ppt課件-資料下載頁
2025-05-12 05:36本頁面
【正文】 ? Use altsyncram MegaFunction ? DSP Implementation ? Mode Multiplication ? MultiplyAccumulation ? MultiplyAddition ? Less power than using ALM Large RAM Small RAM MRAM M4K Medium RAM M4K M512 169。 2022 Altera Corporation Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus, and MegaCore are trademarks of Altera Corporation 24 LowPower Design – Glitch Reduction ? Some logic produces many edges/transitions per cycle ? . CRC/parity, binational multipliers ? Each transition, or glitch, results in unnecessary power consumption ? Register inputs amp。 outputs of to filter out “glitchy” behavior ? Insert pipeline registers if possible Downstream Logic D Q 169。 2022 Altera Corporation Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus, and MegaCore are trademarks of Altera Corporation 25 LowPower Design – Pipelining ? Effective for glitch prone arithmetic systems ? Advantages ? Increased speed ? Short logic depth ? Reduced switching (less dynamic power) ? Disadvantages ? Increased logic and register utilization ? May increase power for designs with minimal glitches ? Latency and throughput changed 169。 2022 Altera Corporation Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus, and MegaCore are trademarks of Altera Corporation 26 Power Optimization Advisor ? Explains power analysis best practices ? Provides Optimization suggestions ? Highlights remended settings not enabled in design 169。 2022 Altera Corporation Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus, and MegaCore are trademarks of Altera Corporation 27 Design Space Explorer ? Searches Quartus options to find best implementation ? “Search for Lowest Power” ? Finds settings that minimize power while meeting timing constraints ? “quartus_sh –dse”, or Tools Menu 169。 2022 Altera Corporation Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus, and MegaCore are trademarks of Altera Corporation 28 Conclusion ? Power reduction is a major part of successful FPGA design ? Quartus II software provides options to reduce power ? PowerDriven Synthesis ? PowerDriven Fitting ? LowPower Design techniques reduce power further ? Adding Clock Enables can reduce switching power ? GlitchRemoval, Pipelining also reduces power ? Power Optimization Advisor ? Design Space Explorer settings for lowest power
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