artiilecture5single-cyclecontrolanddatapath：第二部分講座5單周期控制和數(shù)據(jù)通路(編輯修改稿)
2025-02-08 07:40 本頁(yè)面
【文章內(nèi)容簡(jiǎn)介】 R e a d d a t a 2R e a d r e g i s t e r 1R e a d r e g i s t e r 2D a t a m e m o r yW r i t e d a t aR e a d d a t aW r i t e d a t aS i g n e x t e n dA L U r e s u l tZ e r oA L UA d d r e s sM e m R e a dM e m W r i t eR e g W r i t eA L U o p e r a t i o n3op rs rt immediate 0 16 21 26 31 6 bits 16 bits 5 bits 5 bits 20 Datapath for Branch Instructions ? The ALU is used to evaluate the branch condition and a separate adder is used to pute the branch target address as the sum of the incremented PC and the signextended lower 16 bits of the instruction shifted left by 2 bits 1 6 3 2S i g n e x t e n dZ e r oA L US u mS h i f t l e f t 2T o b r a n c h c o n t r o l l o g i cB r a n c h t a r g e tP C + 4 f r o m i n s t r u c t i o n d a t a p a t hI n s t r u c t i o nA d dR e g i s t e r sW r i t e r e g i s t e rR e a d d a t a 1R e a d d a t a 2R e a d r e g i s t e r 1R e a d r e g i s t e r 2W r i t e d a t aR e g W r i t eA L U o p e r a t i o n3 21 Combining Datapaths for Memory amp。 Rtype Instructions I n s t r u c t i o nR e g i s t e r sW r i t e r e g i s t e rR e a d d a t a 1R e a d d a t a 2R e a d r e g i s t e r 1R e a d r e g i s t e r 2W r i t e d a t aA L U r e s u l tA L UZ e r oR e g W r i t eA L U o p e r a t i o n3I n s t r u c t i o n1 6 3 2R e g i s t e r sW r i t e r e g i s t e rR e a d d a t a 1R e a d d a t a 2R e a d r e g i s t e r 1R e a d r e g i s t e r 2D a t a m e m o r yW r i t e d a t aR e a d d a t aW r i t e d a t aS i g n e x t e n dA L U r e s u l tZ e r oA L UA d d r e s sM e m R e a dM e m W r i t eR e g W r i t eA L U o p e r a t i o n3Rtype Memory 22 Using the Multiplexor 23 Adding “Instruction Fetch” ? The Instruction Fetch portion of the datapath has now been added to the previous datapath P CI n s t r u c t i o n m e m o r yR e a d a d d r e s sI n s t r u c t i o n1 6 3 2R e g i s t e r sW r i t e r e g i s t e rW r i t e d a t aR e a d d a t a 1R e a d d a t a 2R e a d r e g i s t e r 1R e a d r e g i s t e r 2S i g n e x t e n dA L U r e s u l tZ e r oD a t a m e m o r yA d d r e s sW r i t e d a t aR e a d d a t aM u x4A d dM u xA L UR e g W r i t eA L U o p e r a t i o n3M e m R e a dM e m W r i t eA L U S r cM e m t o R e g 24 Simple Datapath for the MIPS Architecture ? Finally, adding the datapath for branch instructions P C I n s t r u c t i o n m e m o r y R e a d a d d r e s s I n s t r u c t i o n 1 6 3 2 A d d A L U r e s u l t M u x R e g i s t e r s W r i t e r e g i s t e r W r i t e d a t a R e a d d a t a 1 R e a d d a t a 2 R e a d r e g i s t e r 1 R e a d r e g i s t e r 2 S h i f t l e f t 2 4 M u x A L U o p e r a t i o n 3 R e g W r i t e M e m R e a d M e m W r i t e P C S r c A L U S r c M e m t o R e g A L U r e s u l t Z e r o A L U D a t a m
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