外文翻譯--燃?xì)鈭?bào)警器-其他專業(yè)(編輯修改稿)
2025-02-24 10:16 本頁面
【文章內(nèi)容簡介】 with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM， timer/counters， serial port， and interrupt system to continue functioning. The Powerdown mode saves the RAM contents but freezes the oscillator， disabling all other chip functions until the next interrupt or hardware reset. VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8bit open drain bidirectional I/O port. As an output port， each pin can sink eight TTL inputs. When 1sare written to port 0 pins， the pins can be used as highimpe dance inputs. Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode， P0 has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification. Port 1 Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins， they are pulled high by the internal pullups and can be used as inputs. As inputs， Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition， and can be configured to be the timer/counter 2 external count input () and the timer/counter 2 trigger input ()， respectively， Port 1 also receives the loworder address bytes during Flash programming and verification 4 Port 2 Port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins， they are pulled high by the internal pullups and can be used as inputs. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX @DPTR). In this application， Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX @ RI)， Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash prog
醫(yī)療健康相關(guān)推薦
鄂ICP備17016276號-1