【正文】 摘要 本 科 畢 業(yè) 設(shè) 計(jì) 論 文 題 目 基于 CPLD 的交通燈 控制器 設(shè)計(jì) 西安交通大學(xué)城市學(xué)院本科生畢業(yè)設(shè)計(jì) （論文） 摘 要 當(dāng)今時(shí)代是一個(gè)自動(dòng)化時(shí)代，交通燈控制等很多行業(yè)的設(shè)備都與計(jì)算機(jī)密切相關(guān)。因此，一個(gè)好的交通燈控制系統(tǒng)，將給道路擁擠、違章控制等方面給予技術(shù)革新。隨著大規(guī)模集成電路及計(jì)算機(jī)技術(shù)的迅速發(fā)展，以及人工智能在控制技術(shù)方面的廣泛運(yùn)用，智能設(shè)備有了很大的發(fā)展，是現(xiàn)代科技發(fā) 展的主流方向。本文介紹了一個(gè)交通燈系統(tǒng)的設(shè)計(jì)。 本文介紹的是基于 EDA 技術(shù)設(shè)計(jì)交通燈系統(tǒng)的一種方案。 EDA 技術(shù)的一個(gè)重要特征就是使用硬件描述語(yǔ)言 (HDL)來完成系統(tǒng)的設(shè)計(jì)文件，應(yīng)用 VHDL 的數(shù)字電路實(shí)驗(yàn)降低了數(shù)字系統(tǒng)的設(shè)計(jì)難度 ,這在電子設(shè)計(jì)領(lǐng)域已得到設(shè)計(jì)者的廣泛采用。本設(shè)計(jì)就是針對(duì)交通信號(hào)燈控制器的設(shè)計(jì)問題，提出了基于 VHDL 語(yǔ)言的交通信號(hào)燈系統(tǒng)的硬件實(shí)現(xiàn)方法。 本設(shè)計(jì)利用 VHDL 語(yǔ)言來實(shí)現(xiàn)交通燈控制器。通過對(duì)系統(tǒng)進(jìn)行結(jié)構(gòu)分析，采用自頂向下的層次化設(shè)計(jì)方法， 分別給出了用于控制交通燈明滅和倒計(jì)時(shí)功能的控制模塊 ，用于緊急情況的分頻模塊，以及控制各個(gè)方向數(shù)碼管的譯碼顯示模塊，最終形成用于自動(dòng)控制十字路口的交通燈和計(jì)時(shí)器的交通燈控制器。 從本文最后給出的仿真結(jié)果可知，該交通燈控制器實(shí)現(xiàn)了預(yù)期目標(biāo)。 關(guān)鍵詞 ： 交通信號(hào)燈， VHDL 語(yǔ)言 ，仿真 摘要 ABSTRACT The modern age is an era of automation, traffic light control equipment for many industries are closely related with the puter. Therefore, a good traffic light control system, will bring technical innovations for road congestion, illegal control, etc. With the rapid development of large scale integrated circuits and puter technology and the extensive use of intelligent devices in the control of artificial intelligence technology, intelligent devices have gotten great progress and bee the mainstream of the development of modern science . This paper describes the system design of traffic lights . Traditional traffic light control system is mostly achieved by a single chip or PLC, this paper introduces a scheme of the design of traffic signal systems based on EDA technology . An important feature of EDA technology is the use of hardware description language (HDL) to plete the system design documents, the experiment applied VHDL digital circuit reduces the difficulty of digital system design, which has been widely adopted by the designers of electronic area. This design puts forward a method of hardware implementation for traffic lights system based on VHDL language to resolve the design problem of traffic signal controller . Each module is given VHDL program by analyzing the structure of the system and using a hierarchical design method, and it applies Max Plus Ⅱ on the simulation of applications , and the corresponding simulation results are gained. When design the circuit with VHDL, we should be fully aware of the characteristics of VHDL language and optimize the circuit design from the design, the use of statements and methods of description, optimizing circuit design, we can use smaller programmable logic chip, thereby reducing system cost. Design and implementation of traffic light controller with VHDL the system for structural analysis, using topdown hierarchical design method, gives a VHDL program modules, and applications using Quartus II simulation, have e to the corresponding simulation design with VHDL language, should be 西安交通大學(xué)城市學(xué)院本科生畢業(yè)設(shè)計(jì) （論文） fully aware of the features of VHDL language, from the design, use statement, and description of the superior aspects of optimized circuit optimization design of circuits, programmable logic chip can use smaller, thus reducing system costs. Keywords: Traffic light ， VHDL language ， Simulation 摘要 西安交通大學(xué)城市學(xué)院本科生畢業(yè)設(shè)計(jì) （論文） 目錄 摘 要 ............................................................................................................................ 2 ABSTRACT................................................................................................................... 3 第一章 前言 ................................................................................................................ 8 選題意義 .......................................................................................................... 8 交通燈發(fā)展史及國(guó)內(nèi)外研究現(xiàn)狀 .................................................................. 9 主要研究?jī)?nèi)容 ................................................................................................11 章節(jié)安排 ........................................................................................................12 第二章 本文 研究平臺(tái) 簡(jiǎn)介 ...................................................................................... 12 CPLD 復(fù)雜可編程邏輯器件 ......................................................................... 13 CPLD 結(jié)構(gòu)及其發(fā)展 ...................................................................................13 CPLD 的特點(diǎn)及其使用 .............................................................................. 13 EPM7128SLC8415 芯片介紹 .................................................................. 14 VHDL 硬件編輯語(yǔ)言 ..................................................................................... 14 VHDL 語(yǔ)言及其發(fā)展 ..................................................................................15 VHDL 語(yǔ)言設(shè)計(jì)流程 .................................................................................. 15 VHDL 的描述風(fēng)格 ...................................................................................... 15 選擇 VHDL 硬件描述語(yǔ)言設(shè)計(jì)的優(yōu)勢(shì) ....................................................17 Quartus Ⅱ 簡(jiǎn)介 ............................................................................................... 18 第三章 交通燈系統(tǒng)的設(shè)計(jì) ...................................................................................... 20 紅綠燈交通信號(hào)系統(tǒng)功能描述 .................................................................... 20 任務(wù)和要求 .......................................................................................... 20 設(shè)計(jì)思想 .............................................................................................. 20 紅綠燈交通信號(hào)系統(tǒng)的 VHDL 模塊 .......................................................... 24 控制模塊 .............................................................................................. 24 分頻模塊 .....................................