【正文】 電子科學(xué)與技術(shù)外文翻譯 班 級： 學(xué) 號(hào)： 姓 名： 指導(dǎo)教師： 時(shí) 間： 34 / 34 Design of integrated GHz, 2 W tuned RF power amplifier Abstract： This paper describes the design of an integrated tuned power amplifier specified to operate at Inmarsat satellite uplink frequencies from to basic topology of the amplifier lies on the parallel tuned inverse class E amplifier that is modified by placing the DCblocking capacitor into a new position and by adjusting the size of the capacitor to improve stability below the desired band. Further, the new positioning reduces losses between drain and load. The high currents flowing in the circuit made it necessary to use wide inductor width and highQ finger capacitors in the onchip resonator. The amplifier was implemented as a Gallium Arsenide (GaAs) integrated circuit (IC) that delivered 2 W of output power while the drain efficiency was ca. 56%.Measurements included source and load pulls to further improve the performance of the amplifier and to investigate the stability at small input drive levels.Keywords: Inverse class E?Power ? Bias network 1 IntroductionThe usability of traditional linear amplifiers in today’s high power munications systems is limited due to their low efficiency. This fact has driven the interest of research towards more efficient amplifiers such as class E [1–3] and inverse class E [4]. Also, the demand of higher output power means higher peak currents and voltages in the drain or collector circuits. This creates high requirements for both maximum breakdown values of the transistor and to the passive circuitry of the monolithic microwave integrated circuit (MMIC). The effect of limited conductivity and limited capability to cope with heat can be minimized through careful design of MMIC. Further, emerging transistor technologies seem to withstand larger current densities and peak voltages [5], and therefore, the choice of technology is increasingly important when designing high power devices. The aim of this paper is to show experiences related to the design of switching high power radio frequency(RF) amplifiers (PA) with integrated output pulse shaping. In the second chapter the introduction to class E and inverse class E operation is revisited and the differences between the two topologies are third chapter describes the design of the input and output circuitry, stabilizing circuits and provides some tips to minimize timing differences at the input of a multifinger transistor. The fourth chapter shows the final schematic and a photo of the implemented chip. The measured performance is reported in chapter five by using both basic single tone measurement equipment and a modern load pull system using multipurpose tuners(MPT). The last section provides a summary of the article and discussion of the issues related to stabilizing circuits. 2 Class E and inverse class E amplifiers Class E and inverse class E are regarded as switching amplifiers. Ideally, in both of them the transistor is driven either on or off and this switching operation produces a series of voltage and current pulses to the output. These pulses are phase shifted and therefore do not overlap with each other. Ideal nonoverlap causes the transistor to operate with drain efficiency of 100%. Classical class E drain waveforms, normalized to DC values of supply current and voltage, are shown in solid line is normalized drain current waveform and the dashed line is normalized drain voltage. The requirement for optimal operation in class E is zero voltage switching (ZVS), where the drain voltage and its derivative goes to zero just before the transistor starts to conduct. In inverse class E the waveforms have swapped places so that the solid line waveform in is the drain voltage and the dashed line is the drain current. The optimal operation is also changed to zerocurrent switching (ZCS), where the current and its derivative goes smoothly to zero before the transistor enters nonconducting phase. Advantages of inverse class E over classical realization are that the drain peak voltages are lower than in classical class E and the inductance values in the output circuitry are smaller, which can save area in a MMIC chip implementation and can usually give smaller electrical series resistance (ESR) [4]. Also, the possibility to acmondate series inductance as a part of resonating circuitry is useful, since the parasitic reactances can cause undamped resonances to drain waveforms [6, 7]. These advantages were the reasons for choosing inverse class E topology as a starting point for our investigation. However, the tuned implementation is not traditional inverse class E, although it has similar pulsed operation. 3 Design of tuned power amplifier GaAs IC processThe IC process used is a Triquint Semiconductor’s pseudomorphic high electron mobility transistor (pHEMT) process named TQPED. The process utilizes both enhancement and depletion mode field effect transistors (FETs) with length optical lithography gates, but in our case we used only depletion mode transistors. The available depletion mode transistors have a transition frequency (Ft) of 27 GHz, draingate breakdown voltage of15 V and nominal pinchoff point V. Transistors models used are TOM3 FET models. There are several other features in the process: nichrome (NiCr) resistors for precision and bulk for high value resistors, high value Metal–Insulator–Metal (MIM) capacitors, 1 local and 2thick global metal layers [8]. Design of the resonator The difference between the original inverse class E in the final tuned topology used in our design,shown in , is the location of blocking cap