【導(dǎo)讀】自動(dòng)往返電動(dòng)小汽車設(shè)計(jì)。智能小車也稱輪式機(jī)器人是一種以汽車電子為背景涵蓋智能控制模式識(shí)別。傳感技術(shù)電子電氣計(jì)算機(jī)機(jī)械等多學(xué)科的科技創(chuàng)意性設(shè)計(jì)一般主要由路徑識(shí)別。速度采集角度控制及車速控制等模塊組成。最小系統(tǒng)液晶顯示模塊電路以及聲光信號(hào)的控制電機(jī)的驅(qū)動(dòng)電路通過KeilC和。PROTEUS的仿真通過實(shí)踐操作與調(diào)試實(shí)現(xiàn)自動(dòng)往返小車設(shè)計(jì)綜合運(yùn)用單片機(jī)技。術(shù)自動(dòng)控制理論檢測(cè)技術(shù)等使小車能在無人操作情況下借助傳感器識(shí)別路面環(huán)。境由單片機(jī)控制行進(jìn)實(shí)現(xiàn)初步的無人控制單片機(jī)具有體積小重量輕耗電少功能。強(qiáng)控制靈活方便且價(jià)格低廉等優(yōu)點(diǎn)智能小車采用單片機(jī)為控制器核心其集成度。本設(shè)計(jì)以單片機(jī)為核心附以外圍電路采用光電檢測(cè)器進(jìn)行檢測(cè)信號(hào)和循線。退左轉(zhuǎn)右轉(zhuǎn)顯示行駛速度行駛路程行駛時(shí)間等智能控制系統(tǒng)。§342測(cè)速里程計(jì)量傳感器設(shè)計(jì)25. 高新技術(shù)綜合體本次畢設(shè)的自動(dòng)往返電動(dòng)小汽車就是這種綜合體的一種嘗試小。單片機(jī)的運(yùn)算和處理能力來實(shí)現(xiàn)小車的自動(dòng)加速限速減速前進(jìn)后退和金

　　

【正文】 e another Description The AT89C51 is a lowpower highperformance CMOS 8bit microputer with 4K bytes of Flash programmable and erasable read only memory PEROM The device is manufactured using Atmels highdensity nonvolatile memory technology and is patible with the industrystandard MCS51 instruction set and pinout The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer By bining a versatile 8bit CPU with Flash on a monolithic chip the Atmel AT89C51 is a powerful microputer which provides a highlyflexible and costeffective solution to many embedded control applications Function characteristic The AT89C51 provides the following standard features 4K bytes of Flash 128 bytes of RAM 32 IO lines two 16bit timercounters a five vector twolevel interrupt architecture a full duplex serial port onchip oscillator and clock circuitry In addition the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes The Idle Mode stops the CPU while allowing the RAM timercounters serial port and interrupt system to continue functioning The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset Pin Description VCCSupply voltage GNDGround Port 0 Port 0 is an 8bit opendrain bidirectional IO port As an output port each pin can sink eight TTL inputs When 1s are written to port 0 pins the pins can be used as highimpedance inputsPort 0 may also be configured to be the multiplexed loworder addressdata bus during accesses to external program and data memory In this mode P0 has internal pullupsPort 0 also receives the code bytes during Flash programmingand outputs the code bytes during programverification External pullups are required during programverification Port 1 Port 1 is an 8bit bidirectional IO port with internal pullupsThe Port 1 output buffers can sinksource four TTL inputsWhen 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs As inputsPort 1 pins that are externally being pulled low will source current IIL because of the internal pullupsPort 1 also receives the loworder address bytes during Flash programming and verification Port 2 Port 2 is an 8bit bidirectional IO port with internal pullupsThe Port 2 output buffers can sinksource four TTL inputsWhen 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs As inputsPort 2 pins that are externally being pulled low will source current because of the internal pullupsPort 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses In this application it uses strong internal pullupswhen emitting 1s During accesses to external data memory that use 8bit addresses Port 2 emits the contents of the P2 Special Function RegisterPort 2 also receives the highorder address bits and some control signals during Flash programming and verification Port 3 Port 3 is an 8bit bidirectional IO port with internal pullupsThe Port 3 output buffers can sinksource four TTL inputsWhen 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs As inputsPort 3 pins that are externally being pulled low will source current IIL because of the pullupsPort 3 also serves the functions of various special features of the AT89C51 as listed below Port 3 also receives some control signals for Flash programming and verification RST Reset input A high on this pin for two machine cycles while the oscillator is running resets the device ALEPROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory This pin is also the program pulse input PROG during Flash programmingIn normal operation ALE is emitted at a constant rate of 16 the oscillator frequency and may be used for external timing or clocking purposes Note however that one ALE pulse is skipped during each access to external Data Memory If desired ALE operation can be disabled by setting bit 0 of SFR location 8EH With the bit set ALE is active only during a MOVX or MOVC instruction Otherwise the pin is weakly pulled high Setting the ALEdisable bit has no effect if the microcontroller is in external execution mode PSEN Program Store Enable is the read strobe to external program memoryWhen the AT89C51 is executing code from external program memory PSEN is activated twice each machine cycle except that two PSEN activations are skipped during each access to external data memory EAVPP External Access Enable EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH Note however that if lock bit 1 is programmed EA will be internally latched on resetEA should be strapped to VCC for internal program executionsThis pin also receives the 12volt programming enable voltage VPP during Flash programming for parts that require12volt VPP XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit XTAL2 Output from the inverting oscillator amplifier Oscillator Characteristics XTAL1 and XTAL2 are the input and output respectivelyof an inverting amplifier which can be configured for use as an onchip oscillator as shown in Figure 1Either a quartz crystal or ceramic resonator may be used To drive the device from an external clock source XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2There are no requirements on the duty cycle of the external clock signal since the input to the internal clocking circuitry i