【導(dǎo)讀】在儀器儀表應(yīng)用領(lǐng)域中，電阻測(cè)量是一個(gè)比較普遍的要求。本系統(tǒng)將介紹采用MSP430單片機(jī)實(shí)現(xiàn)電阻測(cè)量系統(tǒng)。本設(shè)計(jì)基于單片機(jī)技術(shù)原理，以MSP430單片機(jī)芯片作為核心，用點(diǎn)陣式液晶顯示芯片LCD1602完成液晶顯示功能，增加了顯示的美觀性與直觀性；有電流源電路、放大器電路、跟隨器電路組成的恒流源作為電源為MSP430單片機(jī)提供穩(wěn)定的電流；在模擬信號(hào)采集和輸出模塊中運(yùn)用TI公司生產(chǎn)的PGA204可編程增益儀表放大器，使產(chǎn)品實(shí)現(xiàn)了高精度、微功耗以及微小型封裝的完美組合，對(duì)模擬信號(hào)進(jìn)行前置濾波放大，減小無(wú)用信號(hào)的干擾，提高了穩(wěn)定性。本系統(tǒng)大部分功能通過(guò)軟件編程來(lái)實(shí)現(xiàn)，LCD顯示功能，提供了友好的人機(jī)交互界面，能適合各種工作場(chǎng)合。本設(shè)計(jì)是基于單片機(jī)的電阻測(cè)量，應(yīng)用恒流源測(cè)電阻具有測(cè)量電路簡(jiǎn)單、快速、準(zhǔn)確等特點(diǎn)。圖1-1為系統(tǒng)的原理框圖。時(shí)鐘電路記錄系統(tǒng)時(shí)間，顯示

　　

【正文】 r39。s data, these two kind of patterns may through set its P/S pin Gao Huozhi to carry on lowly the choice. When works under the parallel input pattern, uPD16682A selects patches or strips of land as worth saving for seed the signal end, the readwrite signal end as well as the control signal end (A0) and the data line (D0~D7) should carry on the connection with the micro controller39。s corresponding port. This time the uPD16682A interior demonstrates RAM the data by the refurbishing liquid crystal display content, may also through the data bus read demonstration memory content. When works under the serial pattern, uPD16682A only uses data line D6 to input the serial data, namely the serial main line39。s data input end (SI), data line D7 serves as the clock input (SCL) the end, and (A0) carries on the piece the signal and the control signal with the micro controller main line the connection, sets at high or the earth readwrite signal. This time the uPD16682A interior demonstrated that RAM the data accessing is unidirectional, namely the micro controller only may to demonstrate that RAM writes the data by the refurbishing liquid crystal display content, but may not read demonstrates RAM the content. uPD16682A serial interfacethe uPD16682A serial interface is the TTL level, is not the standard serial interface, does not have the concrete baudrate, the data interface agreement request to serial data39。s receive, the interior including 1 8 shift register and 1 3 counters. UPD16682A along catches in each serial clock39。s rise the serial data to its internal shift register, simultaneously counter automatic Canada 1. When the serial data is caught in turn after the D7~D0 order, in the 8th clock cycle39。s rise along, has received the interior 8 serial bit data to transform 8 parallel data。 At the same time, uPD16682A on read control holding wire A0 level, and judges according to a0 signal current 8 serial bit data which reads in is a demonstration data is a control mand. To controls holding wire A0 to read the operation to control by the uPD16682A internal timer, after every other 8 serial clocks automatic operation one time. uPD16682A control mand uPD16682A through reads its control holding wire A0 the level to judge current the data which the equipment receives from the piece is a demonstration data or the control mand. When A0 level for high, what thinks receives is a demonstration data。 But when A0 level for low, then thought what receives is a display control order. May realize using the uPD16682A control mand to the uPD16682A majority operation controls.uPD16682A and MSP430F149 hardware interface designssystem uPD16682A and the MSP430F149 hardware interface schematic drawing. In the chart the system uses the 4MHz crystal oscillator, and obtains the clock which by the system clock frequency division other in peripheral devices use. MSP430F149 and uPD16682A connect the I/O mouth is defined as the output, after MSP430F149 uses the internal 12 A/D gathering sensor transforms the voltage signal. After program processing, transmits orally through above I/O delivers uPD16682A to carry on the information demonstration. Because the actuation liquid crystal display39。s voltage needs several V, if the system board uses the +3V list power supply, then the liquid crystal display driver must use the internal boosted circuit. In the chart uPD16682A uses the internal 4 voltage doubling connection mode.液晶顯示驅(qū)動(dòng)器uPD16682A簡(jiǎn)介uPD16682是NEC公司2001年初推出的液晶顯示驅(qū)動(dòng)器，該產(chǎn)品內(nèi)置大容量顯示RAM內(nèi)存，并能夠提供13265點(diǎn)陣的全點(diǎn)顯示，特別適合用于1616或1212點(diǎn)陣中、日文字符顯示。該產(chǎn)品采用+3V單電源供電，內(nèi)置升壓電路并具3倍壓和4倍壓兩種工作模式，支持8位串行或并行數(shù)據(jù)的輸入，內(nèi)置時(shí)鐘發(fā)生電路和程序可編程控制的偏壓電路。1. uPD16682A的顯示內(nèi)存uPD16682A的顯示RAM內(nèi)存保存著被顯示內(nèi)容的點(diǎn)陣信息。顯示RAM的每一位對(duì)應(yīng)顯示屏上的一個(gè)點(diǎn)，總共可以存儲(chǔ)13265點(diǎn)的信息；通過(guò)選擇對(duì)應(yīng)的RAM頁(yè)地址和列地址，微控制器可以訪問(wèn)其中的任何一個(gè)點(diǎn)。微控制器對(duì)uPD16682A的顯示RAM的讀寫操作通過(guò)uPD16682A的I/O緩沖器進(jìn)行（串行模式下uPD16682A不支持讀操作），并且該讀操作和液晶顯示屏驅(qū)動(dòng)信號(hào)的讀取操作是獨(dú)立的，因此，當(dāng)顯示內(nèi)存的數(shù)據(jù)同時(shí)被雙方訪問(wèn)時(shí)，不會(huì)出現(xiàn)顯示信息的抖動(dòng)等現(xiàn)象。從微控制器讀入的顯示數(shù)據(jù)按照D7～D0的數(shù)據(jù)位順序與液晶顯示屏的行順序一一對(duì)應(yīng)，其顯示關(guān)系對(duì)應(yīng)圖如圖1所示。如果在系統(tǒng)中使用了多片uPD16682A，則在片間進(jìn)行顯示數(shù)據(jù)的轉(zhuǎn)移和顯示一整幅圖案時(shí)用戶就會(huì)有很大的自由度。2. uPD16682A與微控制器的接口uPD16682A可以通過(guò)8位雙向數(shù)據(jù)總線（并行模式下）或者通過(guò)串行總線接收來(lái)自微控制器的數(shù)據(jù)，這兩種模式可以通過(guò)將其P/S引腳置高或置低進(jìn)行選擇。當(dāng)工作于并行輸入模式下時(shí)，uPD16682A的片選信號(hào)端、讀寫信號(hào)端以及控制信號(hào)端（A0）和數(shù)據(jù)線（D0～D7）都應(yīng)該同微控制器的對(duì)應(yīng)端口進(jìn)行連接。此時(shí)uPD16682A內(nèi)部顯示RAM的數(shù)據(jù)以刷新液晶顯示的內(nèi)容，也可以通過(guò)數(shù)據(jù)總線讀取顯示內(nèi)存的內(nèi)容。當(dāng)工作于串行模式下，uPD16682A僅使用數(shù)據(jù)線D6輸入串行數(shù)據(jù)，即串行總線的數(shù)據(jù)輸入端（SI），數(shù)據(jù)線D7被用作時(shí)鐘輸入（SCL）端，并將片將信號(hào)和控制信號(hào)（A0）同微控制器總線進(jìn)行連接，置高或接地讀寫信號(hào)。此時(shí)uPD16682A內(nèi)部顯示RAM的數(shù)據(jù)訪問(wèn)是單向的，即微控制器只可以向顯示RAM寫數(shù)據(jù)以刷新液晶顯示的內(nèi)容，但不可以讀取顯示RAM的內(nèi)容。3. uPD16682A的串行接口uPD16682A的串行接口是TTL電平，不是標(biāo)準(zhǔn)的串行接口，對(duì)串行數(shù)據(jù)的接收沒(méi)有具體波特率、數(shù)據(jù)接口協(xié)議的要求，內(nèi)部包括1個(gè)8位的移位寄存器和1個(gè)3位的計(jì)數(shù)器。UPD16682A在每個(gè)串行時(shí)鐘的上升沿將串行數(shù)據(jù)捕獲到其內(nèi)部的移位寄存器，同時(shí)計(jì)數(shù)器自動(dòng)加1。當(dāng)串行數(shù)據(jù)按照D7～D0的順序被依次捕獲到后，在第8個(gè)時(shí)鐘周期的上升沿，已接收到內(nèi)部的8位串行數(shù)據(jù)被轉(zhuǎn)換成一個(gè)8位的并行數(shù)據(jù)；同時(shí)，uPD16682A讀取控制信號(hào)線A0上的電平，并且根據(jù)A0信號(hào)來(lái)判斷當(dāng)前被寫入的8位串行數(shù)據(jù)是一個(gè)顯示數(shù)據(jù)還是一個(gè)控制命令。對(duì)控制信號(hào)線A0的讀操作由uPD16682A的內(nèi)部定時(shí)器來(lái)控制，在每隔8個(gè)串行時(shí)鐘之后自動(dòng)操作一次。4. uPD16682A的控制指令uPD16682A通過(guò)讀取其控制信號(hào)線A0的電平來(lái)判斷當(dāng)前從片外設(shè)備接收的數(shù)據(jù)是一個(gè)顯示數(shù)據(jù)還是控制命令。當(dāng)A0電平為高時(shí)，認(rèn)為接收到的是一個(gè)顯示數(shù)據(jù)；而當(dāng)A0電平為低時(shí)，則認(rèn)為接收到的是一個(gè)顯示控制命令。利用uPD16682A的控制命令可以實(shí)現(xiàn)對(duì)uPD16682A大多數(shù)操作的控制。5. uPD16682A與MSP430F149的硬件接口設(shè)計(jì)系統(tǒng)uPD16682A與MSP430F149的硬件接口圖系統(tǒng)采用4MHz晶振，并由系統(tǒng)時(shí)鐘分頻得到其它內(nèi)外設(shè)所用的時(shí)鐘。MSP430F149和uPD16682A相連接的I/O口被定義為輸出，MSP430F149利用片內(nèi)12位A/D采集傳感器變換后的電壓信號(hào)。經(jīng)程序處理后，通過(guò)上述I/O口傳送到uPD16682A進(jìn)行信息顯示。由于驅(qū)動(dòng)液晶顯示的電壓需要十幾V，如果系統(tǒng)板采用+3V單供電，則液晶顯示驅(qū)動(dòng)器必須采用片內(nèi)升壓電路。uPD16682A采用內(nèi)部4倍壓連接方式。