【正文】
ll not reduce the metallization path width connecting the bond to the interconnecting metallization to less than 50 percent of the narrowest entering metallization stripe width. 洞 穴 Scratches, probe marks, etc. in bond pads shall not remove more than 50 percent of the metal or expose underlying material 探 討 印 子 在 下 面 的 Scratches in metal traces shall not result in any shorts. There shall be no scratches in metal traces that result in a possible layer to layer short Scratches or voids on metal traces shall not be greater than 50 percent of the trace width “W”. Grounding areas may have small voids in the top metallization layer. Holes shall not perate sublayers. Note: Adjusting of the microscope focus or dark vision will help in determining if sublayers are perated. There shall be no voids in any capacitors. Active circuit metallization shall have no delamination, blistering, or peeling in glassivation, metal, sublevel dielectrics or other layers. There shall be no delamination, blistering, or peeling in glassivation, metal, sublevel dielectrics or other layers that may be in contact or under active circuit metallization. 水 泡 剝