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wire them together. In 1959, Jack Kilby and Robert Noyce independently invented a means of fabricating multiple transistors on a single slab of semiconductor material. Their invention would e to be known as the integrated circuit, or IC, which is the foundation of our modern puterized world. An IC is so called because it integrates multiple transistors and diodes onto the same small semiconductor chip. Instead of having to solder individual wires between discrete ponents, an IC contains many small ponents that are already wired together in the desired topology to form a circuit. A typical IC, without its plastic or ceramic package, is a square or rectangular silicon die measuring from 2 to 15 mm on an edge. Depending on the level of technology used to manufacture the IC, there may be anywhere from a dozen to tens of millions of individual transistors on this small chip. This amazing density of electronic ponents indicates that the transistors and the wires that connect them are extremely small in size. Dimensions on an IC are measured in units of micrometers, with one micrometer (1mm) being one millionth of a meter. To serve as a reference point, a human hair is roughly 100mm in diameter. Some modern ICs contain ponents and wires that are measured in increments as small as ! Each year, researchers and engineers have been finding new ways to steadily reduce these feature sizes to pack more transistors into the same silicon area, as indicated in Figure . When an IC is designed and fabricated, it generally follows one of two main transistor technologies: bipolar or metaloxide semiconductor (MOS). Bipolar processes create BJTs, whereas MOS processes create FETs. Bipolar logic was more mon before the 1980s, but MOS technologies have since accounted the great majority of digital logic ICs. Nchannel FETs are fabricated in an NMOS process, and Pchannel FETs are fabricated in a PMOS process. In the 1980s, plementaryMOS, or CMOS, became the dominant process technology and remains so to this day. CMOS ICs incorporate both NMOS and PMOS transistors. Application Specific Integrated Circuit An applicationspecific integrated circuit (ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for generalpurpose use. For example, a chip designed solely to run a cell phone is an ASIC. In contrast, the 7400 series and 4000 series integrated circuits are logic building blocks that can be wired together for use in many different applications. As feature sizes have shrunk and design tools improved over the years, the maximum plexity (and hence functionality) possible in an ASIC has grown from 5,000 gates to over 100 ASICs often include entire 32bit processors, memory blocks including ROM, RAM, EEPROM, Flash and other large building blocks. Such an ASIC is often termed a SoC (SystemonChip). Designers of digital ASICs use a hardware description language (HDL), such as Verilog or VHDL, to describe the functionality of ASICs. Fieldprogrammable gate arrays (FPGA) are the modern day equivalent of 7400 series logic and a breadboard, containing programmable logic blocks and programmable interconnects that allow the same FPGA to be used in many different applications. For smaller designs and/or lower production volumes, FPGAs may be more cost effective than an ASIC design. The nonrecurring engineering cost (the cost to setup the factory to produce a particular ASIC) can run into hundreds of thousands of dollars. The general term application specific integrated circuit includes FPGAs, but most designers use ASIC only for nonfield programmable devices and make a distinction between ASIC and FPGAs.HistoryThe initial ASICs used gate array technology. Ferranti produced perhaps the first gatearray, the ULA (Unmitted Logic Array), around 1980. Customization occurred by varying the metal interconnect mask. ULAs had plexities of up to a few thousand gates. Later versions became more generalized, with different base dies customized by both metal and polysilicon layers. Some base dies include RAM elements.Standard cell designIn the mid 1980s a designer would choose an ASIC manufacturer and implement their design using the design tools available from the manufacturer. While third party design tools were available, there was not an effective link from the third party design tools to the layout and actual semiconductor process performance characteristics of the various ASIC designers ended up using factory specific tools to plete the implementation of their designs. A solution to this problem that also yielded a much higher density device was the implementation of Standard Cells. Every ASIC manufacturer could create functional blocks with known electrical characteristics, such as propagation delay, capacitance and inductance。 that could also be represented in third party cell design is the utilization of these functional blocks to achieve very high gate density and good electrical performance. Standard cell design fits between Gate Array and Full Custom design in terms of both its NRE (NonRecurring Engineering) and recurring ponent cost.By the late 1980s, logic synthesis tools, such as Design Compiler, became available. Such tools could pile HDL descriptions into a gatelevel netlist. This enabled a style of design called standardcell design. Standardcell Integrated Circuits (ICs) are designed in the following conceptual stages, although these stages overlap significantly in practice.These steps, implemented with a level of skill mon in the industry, almost always produce a final device that correctly implements the original design, unless flaws are later introduced by the physical fabrication process.A team of design engineers starts with a nonformal understanding of the required functions for a new ASIC, usually derived from requirements analysis.*The design team constructs a description of an ASIC to achieve these goals using an HDL. This process