基于systemview的2dpsk信號(hào)傳輸仿真(編輯修改稿)
2024-07-19 17:14 本頁面
【文章內(nèi)容簡(jiǎn)介】 如表3所示。表3：相干解調(diào)法圖符參數(shù)設(shè)置表編號(hào)庫/名稱參 數(shù)9Butterworth Bandpass IIR3 Poles Low Fc = 20e+3 HzHi Fc = 60e+3 Hz Quant Bits = NoneInit Cndtn = Transient DSP Mode DisabledFPGA Aware = True RTDA Aware = Full10Multiplier:Non ParametricInputs from 11 9 Outputs to 12 2311Comm: CostasVCO Freq = 40e+3 Hz VCO Phase = 0 deg Mod Gain = 1 Hz/vLoop Fltr = 1 + 1/s + 1/s^2 Output 0 = Baseband InPhase Output 1 = Baseband Quadrature Output 2 = VCO InPhase Output 3 = VCO Quadrature t10 t25 RTDA Aware = Full12Operator: Linear SysBessel Lowpass IIR3 Poles Fc = 16e+3 Hz Quant Bits = None Init Cndtn = TransientDSP Mode Disabled FPGA Aware = True RTDA Aware = Full13Operator: SamplerInterpolating Rate = 20e+3 Hz Aperture = 0 sec Aperture Jitter = 0 sec14Operator: HoldLast Value ，Gain = 1 ，Out Rate = 400e+3 HzFalse Output = 1 v，Rise Time = 0 sec，F(xiàn)all Time = 0 sec15Logic: BufferGate Delay = 0 sec Threshold = 0 v True Output = 1 v False Output = 1 v Rise Time = 0 sec Fall Time = 0 sec16Logic: XORGate Delay = 0 sec Threshold = 0 v True Output = 1 v False Output = 1 v Rise Time = 0 sec Fall Time = 0 sec17Operator: DelayNonInterpolating Delay = secOutput 0 = Delay t16 Output 1 = Delay dT 調(diào)制信號(hào)為PN序列，碼速率Rb＝10kbit/s；正弦載波的頻率為20k Hz。系統(tǒng)定時(shí)：起始時(shí)間0秒，終止時(shí)間800e6秒，采樣點(diǎn)數(shù)321，采樣速率400e+3Hz，獲得的仿真波形如圖17所示。 （a）二相相對(duì)調(diào)相（2DPSK）信號(hào) （b）帶通濾波器的輸出 （c）提取的相干載波 （d）乘法器的輸出 （e）低通濾波器的輸出 （f）解調(diào)輸出的相對(duì)碼 （g）解調(diào)輸出的絕對(duì)碼圖17相干解調(diào)過程的仿真波形。 2DPSK系統(tǒng)輸入的PN序列和輸出PN序列的瀑布圖2DPSK信號(hào)輸入~ 2DPSK信號(hào)輸入~輸出PN序列的瀑布圖眼圖如圖19所示。圖19 眼圖圖19的眼圖是沒有加噪聲情況下的仿真結(jié)果，眼圖張開度較大，掃跡清晰。信噪比0dB時(shí)的眼圖信噪比5dB時(shí)的眼圖信噪比20dB時(shí)的眼圖 信噪比30
規(guī)章制度相關(guān)推薦
鄂ICP備17016276號(hào)-1