【正文】 ut of another flipflop. If careful design, travelingwave clock can be the same as the global clock to work reliably. However, the travelingwave clock made from time to time with the calculation of the circuit bees very plicated. Linewave travelingwave clock flipflop of the chain have a greater clock time between the offset and exceed the worst case the setup time, hold time and clock to the output circuit of the delay, allowing the system to the actual slowed down. Multiclock system, many system requirements within the same multiPLD clock. The most mon example is the two asynchronous interfaces between microprocessors, or microprocessors and asynchronous munication channel interface. As the clock signal between the two requirements to establish and maintain a certain time, so that the above application from time to time the introduction of additional constraints. They also requested that some asynchronous synchronization signal. In many applications, only the synchronization of asynchronous signals is not enough, when the system of two or more nonhomologous clock, the data it is difficult to establish and maintain the time to be assured that we will face the plex matter of time . The best way is to all nonhomologous clock synchronization. PLD internal use of the lock loop (PLL or DLL) is a very good, but not all of PLD with a PLL, DLL, and chip PLL with most expensive, so unless there are special requirements, the general occasions PLL can not use with the this time we need to take to enable the use of the D flipflopside, and the introduction of a highfrequency clock. 采用L ED 數(shù)碼管的數(shù)字顯示以其亮度高、顯示直觀等優(yōu)點(diǎn)被廣泛應(yīng)用于智能儀器及家用電器等領(lǐng)域. 本文介紹一種以AT89C52單片機(jī)為核心,以共陽極高亮度L ED 數(shù)碼管作為顯示器件組成7 位數(shù)字顯示的實(shí)用多功能電子時(shí)鐘的設(shè)計(jì),該時(shí)鐘可顯示星期、時(shí)、分、秒,也可切換為年、月、日顯示,同時(shí)具有整點(diǎn)音樂報(bào)時(shí)及定時(shí)鬧鐘等功能,也可作電子秒表使用。然而隨著時(shí)間的推移，人們不僅對(duì)于時(shí)鐘精度的要求越來越高，而且對(duì)于時(shí)鐘功能的要求也越來越多，時(shí)鐘已不僅僅是一種用來顯示時(shí)間的工具，在很多實(shí)際應(yīng)用中它還需要能夠?qū)崿F(xiàn)更多其它的功能。時(shí)鐘已不僅僅被看成一種用來顯示時(shí)間的工具，在很多實(shí)際應(yīng)用中它還需要能夠?qū)崿F(xiàn)更多其它的功能。設(shè)計(jì)以硬件軟件化為指導(dǎo)思想，充分發(fā)揮單片機(jī)功能，大部分功能通過軟件編程來實(shí)現(xiàn)，電路簡單明了，系統(tǒng)穩(wěn)定性高。無論采用何種方式，電路中真實(shí)的時(shí)鐘樹也無法達(dá)到假定的理想時(shí)鐘，因此我們必須依據(jù)理想時(shí)鐘，建立一個(gè)實(shí)際工作時(shí)鐘模型來分析電路，這樣才可以使得電路的實(shí)際工作效果和預(yù)期的一樣。這種全局時(shí)鐘提供器件中最短的時(shí)鐘到輸出的延時(shí)。如果采用任何附加邏在某些工作狀態(tài)下，會(huì)出現(xiàn)競爭產(chǎn)生的毛刺。行波時(shí)鐘在行波鏈上各觸發(fā)器的時(shí)鐘之間產(chǎn)生較大的時(shí)間偏移，并且會(huì)超出最壞情況下的建立時(shí)間、保持時(shí)間和電路中時(shí)鐘到輸出的延時(shí)，使系統(tǒng)的實(shí)際速度下降。這時(shí)我們需要使用帶使能端的D觸發(fā)器，并引入一個(gè)高頻時(shí)鐘。它們也會(huì)要求將某些異步信號(hào)同步化。通常，我們不應(yīng)該用多級(jí)組合邏輯去鐘控PLD設(shè)計(jì)中的觸發(fā)器。通常用陣列時(shí)鐘構(gòu)成門控時(shí)鐘。全局時(shí)鐘對(duì)于一個(gè)設(shè)計(jì)項(xiàng)目來說，全局時(shí)鐘(或同步時(shí)鐘)是最簡單和最可預(yù)測的時(shí)鐘。設(shè)計(jì)不良的時(shí)鐘在極限的溫度、電壓或制造工藝的偏差情況下將導(dǎo)致錯(cuò)誤的行為，并且調(diào)試?yán)щy、花銷很大。本設(shè)計(jì)基于單片機(jī)技術(shù)原理，以單片機(jī)芯片AT89C52作為核心控制器，通過硬件電路的制作以及軟件程序的編制，設(shè)計(jì)制作出一個(gè)多功能數(shù)字時(shí)鐘系統(tǒng)。可以說，設(shè)計(jì)多功能數(shù)字時(shí)鐘的意義已不只在于數(shù)字時(shí)鐘本身，更大的意義在于多功能數(shù)字時(shí)鐘在許多實(shí)時(shí)控制系統(tǒng)中的應(yīng)用。s lives has bee an