電氣專業(yè)畢業(yè)設(shè)計(jì)外文文獻(xiàn)與中文翻譯(存儲(chǔ)版)
【正文】 the needs of OMAP35x processors voltage domain requirements. 中文翻譯：滿足多媒體處理器需求動(dòng)態(tài)電源管理技術(shù)有源電源管理片上電源管理技術(shù)分為兩大類，管理工作系統(tǒng)功耗與管理待機(jī)功耗。s take a look at the active mode. Using DVFS techniques, application performance can be based on demand software to reduce the clock speed and voltage. For example, we may envisage a highlevel integrated RISC microprocessor (ARM) and digital signal processor (DSP) applications processor. Although the ARM speed ponents can be as high as 600 MHz, but the system does not always need such a high puting power. Usually, we can choose software to predefined performance point processor (OPP), the voltage at this time to ensure that the processor in the system can meet performance requirements on the minimum frequency. In order to adapt to different applications to further enhance the flexibility to optimize power, we can interconnect for processors and peripherals in addition a set of predefined core devices OPP. OPP software in accordance with an external regulator is required to send control signals to set the minimum voltage. For example, DVFS apply to the two supply voltage VDD1 (DSP and ARM processors supply voltage) and VDD2 (peripheral subsystems interconnection and power supply voltage), the two voltage rails to provide the majority of chip power ( usually 75% to 80%). In the implementation of MP3 decoder, the DSP processor can be transferred to lowperformance point, thus greatly reducing the power consumption for other tasks, when the ARM operating frequency up to 125 MHz. In order to achieve the best power necessary functionality, we VDD1 can be reduced to volts instead of the maximum voltage of volts to ensure that the working frequency of 600 MHz. Adaptive voltage scaling (AVS) as a second active power management technology, based on the chip manufacturing process, as well as the life cycle of device operation generated based on the difference. The technology and all processors share the same preprogrammed different DVFS the OPP. It can be inferred that the majority of the manufacturing process has matured, the chip39。我們先來看看主動(dòng)模式。在執(zhí)行 MP3 解碼時(shí)，可將 DSP 處理器轉(zhuǎn)入低操作性能點(diǎn)，從而大幅減少功耗供處理其他任務(wù)之用，這時(shí)的 ARM 運(yùn)行頻率高達(dá) 125 MHz。此處的“冷”器件工作在125 ，而“熱”器件在該頻率下只需 伏特。圖 2動(dòng)態(tài)電源切換 (DPS) 在給定器件的某部分完成任務(wù)后使其進(jìn)入低功耗狀態(tài)無源電源管理雖然 DPS 可讓多媒體片上系統(tǒng) (SoC) 的一部分進(jìn)入低功耗狀態(tài)，不過在有些情況下，我們可讓整個(gè)器件都進(jìn)入低功耗模式 — 在沒有應(yīng)用運(yùn)行時(shí)自動(dòng)或通過用戶請(qǐng)求進(jìn)入低功耗模式。此外，OMAP35x 還可自動(dòng)向外部穩(wěn)壓器發(fā)送信號(hào)，穩(wěn)壓器能夠在深度睡眠狀態(tài)下關(guān)閉。在上述所有情況下，我們都可啟動(dòng) AVS 來平衡“冷”“熱”器件的功耗差別。關(guān)閉不使用的穩(wěn)壓器(VDD1 = VDD2 = 0)，自動(dòng)刷新 SDRAM，喚醒時(shí)特殊啟動(dòng)序列恢復(fù) SDRAM 控制器和系統(tǒng)狀態(tài)。片上多通道緩沖串行端口發(fā)送數(shù)據(jù)到音頻編解碼器以用于回放。OMAP3530 處理器的功能模塊分為 18 個(gè)電源域，每個(gè)電源域都擁有自己的開關(guān)。為了減輕設(shè)計(jì)工程師的負(fù)擔(dān)，上述各功能的所有特性最好集成在單個(gè)器件中，從而大幅減少部件數(shù)(圖 3)。市場(chǎng)上的許多穩(wěn)壓器都可滿足上述要求，當(dāng)然還需滿足處理器的電壓、電流、功率轉(zhuǎn)換速率規(guī)范以及功率上升下降排序要求等。在該案例中，我們捕獲并對(duì)音頻進(jìn)行編碼(AACe+、48 kHz、32k bps 立體聲)，捕獲并編碼視頻( VGA 分辨率，每秒 20 幀， Mbsp)，音頻和視頻都保存，同時(shí)顯示視頻。AVS 關(guān)閉。在這些描述中，IVA 指影像、視頻以及音頻加速器子系統(tǒng)。 可滿足各種用途的技術(shù)通過結(jié)合采用上述電源管理技術(shù)，我們可實(shí)現(xiàn)多種操作條件下的最佳功耗。在采用 SLM 技術(shù)情況下，我們以媒體播放器為例，如果打開十秒鐘后還沒有得到處理指令或用戶輸入，就會(huì)關(guān)閉顯示屏進(jìn)入待機(jī)或器件關(guān)閉模式。前兩種有源電源管理技術(shù)可以最小的工作電壓讓器件的某部分工作在理想的速度上?？梢韵胍姡痛蠖鄶?shù)已經(jīng)成熟的制造工藝而言，芯片的性能在既定頻率要求下要遵循一定的分布情況。通常，我們可通過軟件來選擇預(yù)定義的處理器工作性能點(diǎn) (OPP)，這時(shí)的電壓可確保處理器工作在可滿足系統(tǒng)處理性能要求的最低頻率上。s operating frequency is 90 MHz, in the processing cycle without enterin
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