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2025-10-29 04:41 本頁(yè)面
【正文】 an be implemented without processor intervention voltage level dynamic optimization to meet the needs of the process, temperature and silicon attenuation difference caused by the requirements (Figure 1). Figure 1Given the performance of the distribution of a typical processor. Here39。s cool device in the frequency of 125 MHz need to volts, while the hot device in the frequency of only volts. Adaptive voltage scaling (AVS) technology uses the corresponding feedback loop supply voltage regulator to ensure that all devices running tasks in a specific frequency required Software can work for each OPP set up AVS hardware, and control algorithms through I2C bus to send mands to external voltage regulator in order to gradually reduce the output of the appropriate regulator, until just over the target processor frequency requirement. For example, developers can design a first to meet all of the voltage, frequency of 125 MHz at volts (in Figure 1 in the top of the V1). However, if the system using AVS technology to insert the hot device, then the feedback mechanism onchip ARM will automatically be reduced to volts of the voltage or lower (V2 in Figure 1 above). The first two active power management technology can minimize the operating voltage so that a certain part of the device in the desired speed. In contrast, the third method Dynamic power switching (DPS) to determine the device when it can plete the calculation of the current task, if no need, then allow the device to enter lowpower standby mode (Figure 2). For example, the processors are waiting for DMA transfer to plete the process will enter a lowpower state. Processor in a few microseconds after the wakeup call will be able to return to normal working condition.Figure 2 Dynamic power switching (DPS) in a given part of a device after the pletion of the task to enter the lowpower state Passive power management Although the DPS will allow multimedia systemonchip (SoC) as part of entering the lowpower state, but in some cases, we can have the entire device into the low power mode in the absence of the application to run automatically or through user requests access to lowpower. To achieve this end, we can be static leakage management (SLM) technology, start the standby mode or turn off the device. These two models of a key difference is: In standby mode, the device is still occupied by the internal memory and logic, and in the closed mode of the device, all the system state is stored in external memory. The use of SLM technology, wakeup time much faster than the speed of cold start because the procedures have been loaded into the external memory, the user having to wait for the operating system (OS) pletely restarted. In the case of the use of SLM technology, we media player as an example, if after ten seconds to open has not been processing instruction or user input, it will close the display device to enter standby or shut down mode. For example, TI using ARM CortexA8 core OMAP35x devices on a single chip processor to support the device shut down mode, the device can automatically wakeu
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