畢業(yè)設(shè)計論文—基于fpga的電子琴設(shè)計-全文預(yù)覽
【正文】 分的硬件，很難降低其生產(chǎn)成本 .FPGA 技術(shù)的出現(xiàn)及迅速發(fā)展，為利用軟件實現(xiàn)較大規(guī)模的數(shù)字電路設(shè)計提供了方便，降低了數(shù)字電路的設(shè)計周期和相關(guān)產(chǎn)品的成本。 VHDL 能提供高階電路描述語言的方式，讓復(fù)雜的電路可以通過 VHDL 編輯器的電路合成方式，輕易而且快速的達到設(shè)計的規(guī)格。 關(guān)鍵詞 ： 電子琴； FPGA/CPLD； VHDL 語言設(shè)計； MAX+plus11 目 錄 I 目 錄 摘 要 .......................................................................................................................................... I 目 錄 .......................................................................................................................................... I 前言 ........................................................................................................................................ 1 系統(tǒng)設(shè)計總述 .......................................................................................................................... 2 ............................................................................................................................. 2 ............................................................................................................................. 2 總體設(shè)計流程圖 ............................................................................................................. 2 音符頻率的 取得 ............................................................................................................. 2 樂曲節(jié)奏的控制 ............................................................................................................. 3 總體程序設(shè)計 .......................................................................................................................... 4 ............................................................................................................ 4 VHDL程序設(shè)計 ................................................................................................... 4 ............................................................................................................................. 6 分頻器模塊 .................................................................................................................... 7 防抖動模塊 .................................................................................................................... 8 鍵盤譯碼模塊 ................................................................................................................ 9 VHDL音樂硬件演奏電路系統(tǒng)仿真與調(diào)試 .............................................................................. 11 .................................................................................................................. 11 仿真 .........................................................................................................................12 .........................................................................................................................12 .....................................................................................................................13 ............................................................................................................................13 .....................................................................................................................14 .......................................
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