【正文】 up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on should be strapped to VCC for internal program pin also receives the 12volt programming enable voltage(VPP) during Flash programming, for parts that require12volt VPP. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. 沈陽航空工業(yè)學(xué)院電子工程系畢業(yè)設(shè)計(jì)（ 外文翻譯 ） 10 XTAL2 Output from the inverting oscillator amplifier. Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an onchip oscillator, as shown in Figure a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a dividebytwo flipflop, but minimum and maximum voltage high and low time specifications must be observed. Figure 1. Oscillator Connections Figure 2. External Clock Drive Configuration Idle Mode In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the onchip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. Onchip hardware inhibits access to internal RAM in this event, 沈陽航空工業(yè)學(xué)院電子工程系畢業(yè)設(shè)計(jì)（ 外文翻譯 ） 11 but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. Powerdown Mode In the powerdown mode, the oscillator is stopped, and the instruction that invokes powerdown is the last instruction executed. The onchip RAM and Special Function Registers retain their values until the powerdown mode is terminated. The only exit from powerdown is a hardware reset. Reset redefines the SFRs but does not change the onchip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Program Memory Lock Bits On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below. When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly. 沈陽航空工業(yè)學(xué)院電子工程系畢業(yè)設(shè)計(jì)（ 外文翻譯 ） 12 Synthesis of an 8051Like MicroController Tolerant to Transient Faults This paper presents the implementation of a fault detection and correction technique used to design a robust 8051 microcontroller with respect to a particular transient fault called Single Event Upset (SEU). A specific study regarding the effects of a SEU in the microcontroller behavior was performed. Furthermore, a fault tolerant technique was implemented in a version of the 8051. The VHDL description of the faulttolerant microprocessor was prototyped in a FPGA environment and results in terms of area overhead, level of protection and performance penalties are discussed. 1. Introduction The constant improvements achieved in the microelectronics technology allow the manufacturing of very plex circuits, substituting boards or even puters of the past 80’s. Nowadays, because of the microelectronics advances, traditional applications bee cheaper and more reliable, while a large range of new applications can take advantage of integrated devices by using the socalled embedded systems. In all cases, architectures are strongly based on some kind of data processor, such as a microcontroller or a DSP processing unit, for example. The continuous decrease in the semiconductor dimensions and in electrical features, leads to an increasing sensitivity to some effects of the environment (ionization due to radiation, magic perturbations, thermal,...) considered minor or negligible in the technologies of the past. Particularly, digital circuits operating in space are subject to different kinds of radiation. However, some problems have also been reported for some Earth applications, like avionics systems . Radiation effects can be permanent or transient . Permanent faults result from particles trapped at the silicon/oxide interfaces and appear only after long exposure to radiation (Total Ionization Dose). Transient faults (Single Event Effects, SEE) may be caused by the impact of a single charged particle in sensitive zones of the circuit. Depending on the impact location, two kind of SEEs are distinguished: SELs (Single Event Latchups) and SEUs (Single Event Upsets). SELs result from the triggering of 沈陽航空工業(yè)學(xué)院電子工程系畢業(yè)設(shè)計(jì)（ 外文翻譯 ） 13 parasitic thyristors (present in CMOS technologies) and provoke short circuits, capable to damage the ponent by thermal effect if the circuit is not poweredoff at time. SEUs are responsible for transient changes, called upsets or bit flips, in bits of information stored within an integrated circuit. Total ionization dose (TID) and single event latchup (SEL) effects can be reduced to a