【正文】 畢業(yè)設(shè)計(jì) （論文） 基于 VHDL 的等精度頻率計(jì)設(shè)計(jì)與實(shí)現(xiàn) Design and Realization of the Accurate Cymometer Based on VHDL 長(zhǎng) 春 工 程 學(xué) 院： 張興宇 ： 電氣與信息學(xué)院 ： 電子信息工程 ： 0443 ： 倪虹 霞 ： 副教授 ： 2021 年 6 月 20 日 學(xué)生姓名 所在院系 所學(xué)專業(yè) 所在班級(jí) 指導(dǎo)教師 教師職稱 完成時(shí)間 長(zhǎng)春工程學(xué)院畢業(yè)設(shè)計(jì)（論文） 摘 要 基于傳統(tǒng)測(cè)頻原理的頻率計(jì)的測(cè)量精度將隨被測(cè)信號(hào)頻率的下降而降低，在實(shí)用中有較大的局限性， 本設(shè)計(jì)采用單片機(jī) AT89C51作為主要的控制單元，用來完成電路的信號(hào)測(cè)試控制、數(shù)據(jù)運(yùn)算處理、鍵盤掃描和控制數(shù)碼管顯示等功 能，待測(cè)信號(hào)經(jīng)過 LM358放大后又經(jīng)過 74HC14形成系統(tǒng)需要的矩形波，然后送入復(fù)雜可編程邏輯器件 （ CPLD） ，最后由可編程邏輯器件 CPLD進(jìn)行各種時(shí)序控制及計(jì)數(shù)測(cè)頻功能，并用 8位 8段 LED進(jìn)行顯示。 關(guān)鍵詞 單片機(jī) 可編程邏輯器件 頻率計(jì) Abstract Based on the traditional principle of measuring the frequency of the frequency of measurement accuracy will be tested with the frequency and reduce the decline in the more practical AT89C51 use this design as the main control unit, the signals used to plete the circuit test control, data processing, keyboard scanning and digital control of the show, and other functions, under test signal LM358 Larger then after a 74 HC14 system needs Rectangular waves, and then into the plex programmable logic devices (CPLD), programmable logic devices by the end CPLD various control and timing count frequency measurement functions, and with eight 8 of the LED display. Keywords： SCMC CPLD Cymometer 長(zhǎng)春工程學(xué)院畢業(yè)設(shè)計(jì)（論文） I 目 錄 1 引言 ........................................................................................................................................................................1 課題分析 ..................................................................................................................................................... 1 等精度頻率計(jì)在國內(nèi)外發(fā)展概況 ................................................................................................ 1 MAX+PLUS II 簡(jiǎn)介及 VHDL語言簡(jiǎn)介 ............................................................................................ 2 課題要求 ..................................................................................................................................................... 4 2 等精度頻率計(jì)的方案選擇及原理分析 .............................................................................................5 等精度頻率計(jì)測(cè)頻原理 ...................................................................................................................... 5 系統(tǒng)原理框圖 ........................................................................................................................................... 6 周期測(cè)量 ...................................................................................................................................................... 6 脈沖寬度測(cè)量 ........................................................................................................................................... 7 周期脈沖信號(hào)占空比的測(cè)量 ........................................................................................................... 7 3 等精度頻率計(jì)硬件設(shè)計(jì) .............................................................................................................................8 鍵盤控制模塊 .......................................................................................................................................... 8 顯示模塊 ..................................................................................................................................................... 8 主控模塊 ..................................................................................................................................................... 9 信號(hào)輸入放大和整形模塊 .............................................................................................................. 11 音頻輸出電路 ........................................................................................................................................ 12 CPLD功能模塊描述 ............................................................................................................................ 13 4 等精度頻率計(jì)軟件設(shè)計(jì)方案 ............................................................................................................... 14 VHDL語言 .................................................................................................................................................. 14 VHDL軟件設(shè)計(jì)方案 ............................................................................................................................ 15 所需 VHDL 文件及波形仿真結(jié)果 ................................................................................................ 15 單片機(jī)的匯編語言編程 ................................................................................................................... 17 5 電路系統(tǒng)調(diào)試 ............................................................................................................................................... 21 長(zhǎng)春工程學(xué)院畢業(yè)設(shè)計(jì)（論文） II 6 結(jié)論 .................................................................................................................................................................... 22 致 謝 .................................................................................................................................................................. 24 附錄一：元器件清單 ....................................................................................................................................... 25 附錄二：程序清單 ............................................................................................................................................ 26 附錄三：原理圖 ..................................................................................................................................................