【正文】 R), because the reference voltage feeds directly into the DAC39。5V, which allows a degree of safety under fault conditions and plenty of headroom for input and output voltage measurements. Input and output currents are measured using the precision current amplifier MAX471. This device measures the voltage across an internal 30m resistor, and delivers an output current whose amplitude equals 500uA per ampere of highside current. Thus, the value of an external resistor scales the output voltage, and suitable resolution is achieved in this case by selecting a value of . The MAX12539。s 14bit resolution was not of prime importance in the design stage, because measurements to within % (10 bits) are perfectly adequate for most powermeter applications. Once digitized, the results are uploaded via an RS232 interface and displayed on a PC screen, with an update rate of once per second (like most multimeters). Once data arrives at the RS232 port, the power of the PC can be unleashed upon it. The full circuit diagram (Figure 2) will be discussed in sections: Figure 2. Circuit diagram. Analog Front End A precision resistive divider allows accurate voltage measurements up to 30V. The ORNA101 from Vishay Thin Film is a trimmed resistor work prising two 1k and two 10k values. The ratiometric accuracy of these four resistors is %, and so provides a precision fraction (1/11) of the applied voltage. The MAX12539。APPLICATION NOTE 1138 Practical Data Acquisition using a Windows1based Power Meter Abstract: This application note describes the design of a PCbased, 14bit data acquisition system. It takes a system approach, includes all the necessary building blocks: analog, digital, hardware, and software. It discusses each step, testing systems separately before integrating them, and detailing pitfalls learned along the way. Many articles have been written about the building blocks in a typical data acquisition system, but few address the entire system, from analog input to PC display. To cover all the problems encountered in designing a plete data acquisition system, the engineer might have to amass ten articles. The following application note describes the design of a PCbased, 14bit data acquisition system. It takes a system approach, includes all the necessary building blocks: analog, digital, hardware, and software. It discusses each step, testing systems separately before integrating them, and detailing pitfalls learned along the way. The Design Specification The task: Design a power meter based on a 14bit simultaneoussampling ADC with onchip RAM (MAX125). The need for a power meter is apparent to anyone who has tried measuring the input and output characteristics of a DCDC converter using conventional instruments. The design allows users to perform load measurements on the device under test without connecting an endless spaghettimass of test leads. Figure 1 shows the pleted power meter display on a personal puter (PC) monitor. Figure 1. Windows PC output with example readout. To cater for boost, buck, and linear implementations, the measurement range was chosen as 30V for both input and output. Most quality DCDC converters operate at 100kHz or higher. The system39。s frequency response should therefore be higher than 100kHz, but a slower response is also acceptable because the switching waveforms are reasonably repetitive. The system39。s faultprotected input has a range of 177。s wide input capability and faultprotection circuitry give it a lower input impedance than that of equivalent petitive devices, so the four readings are buffered before entering the ADC. Unitygain buffer stages are taken from the MAX4254 quad precision op amp, whose input offset voltages (70uV) are lower than the system resolution. The MAX125 inputs are buffered mainly to overe their low input impedance, but driving an ADC from low impedance is always good practice even when the converter has a high input impedance. Because sample/hold circuitry is normally placed right at the ADC input, the buffer provides the necessary drive for charging the sample/hold capacitor in an acceptable time. To get an idea of how low the source impedance has to be, consider a simple calculation of RC time constant. The input capacitor charges according to vcap = vin (1et/CR), where C is the sampling capacitor, R is the source resistance, and Vin is the voltage applied to the RC circuit. The difference in voltage between Vin and Vcap is: vin vcap = vin et/CR Therefore, given the value of the sample and hold capacitor (normally 1030pF), the charging time of the capacitor, and the error voltage that can be tolerated (1/2 LSB), one can calculate the maximum allowable signalsource resistance that will charge the capacitor in a given time. The input buffer can also serve as a filter for removing unwanted signals. Because the ADC is a sampling system, its output has spectral symmetry centered about half the sampling frequency. Thus, signals greater than half the sampling frequency cannot be distinguished from signals less than