【正文】 東南大學(xué) 成賢學(xué)院 畢業(yè)設(shè)計(jì)報(bào)告（論文）誠(chéng)信承諾 本人承諾所呈交的畢業(yè)設(shè)計(jì)報(bào)告（論文）及取得的成果是在導(dǎo)師指導(dǎo)下完成，引用他人成果的部分均已列出參考文獻(xiàn)。如論文涉及任何知識(shí)產(chǎn)權(quán)糾紛，本人將承擔(dān)一切責(zé)任。因此， 網(wǎng)絡(luò)信息安全 這個(gè)名詞逐漸進(jìn)入人們的眼球。 本課題正是在這樣的背景下提出的，目的是基于 Verilog HDL 設(shè)計(jì)一個(gè) AES 加密電路。設(shè)計(jì) AES 加密電路的核心就是 AES 加密算法的實(shí)現(xiàn)。其次，本文將 AES 加密電路進(jìn)行了模塊劃分，就 Verilog HDL 描述及Modelsim 仿真作了一一介紹。 關(guān)鍵字： AES；加密標(biāo)準(zhǔn)；算法； Verilog HDL； Modelsim . II The design of AES encryption circuit based on Verilog HDL Abstract Nowadays , the puter technology is in a rapid development in the direction of fast and portable in the information society . This means that the electronic form of data and personal information is widely used by us . Therefore , the work information security has aroused people’s attention . The way of how to keep the private information away from the outside world to steal has became the focus of the scholars study now . This topic is put forward in the background I mentioned before in purpose that design a circuit of AES encryption based on Verilog HDL . There are serval tasks to be done according to the subject , including the principle of AES encryption algorithm in the process of analysis and the subsequent hardware implementation . Firstly , the core of the design of AES encryption circuit is the implementation of AES encryption algorithm . Therefore , this article introduces the principle of AES algorithm , including the Sbox 、 shiftrows、mixcoloumns and AES line ranks , etc . Secondly , this paper pared the AES encryption circuit module partition and introduced Verilog HDL description and Modelsim simulation one by one . Finally , it gives the design process of use Synopsys DC and Astro to finish the prehensive and automatic wiring . Key Words : AES 。 Algorithm 。 Modelsim . III 目 錄 第一章 緒論 ..................................................................................................................................... 1 課題研究背景及意義 ............................................................................................................ 1 研究現(xiàn)狀 ............................................................................................................................. 1 國(guó)內(nèi)外加密算法的研究現(xiàn)狀 ........................................................................................ 1 數(shù)據(jù)加密標(biāo)準(zhǔn)的研究現(xiàn)狀 ........................................................................................... 1 課題主要研究?jī)?nèi)容 ............................................................................................................... 2 設(shè)計(jì)流程的介紹 ......................................................................................................... 2 軟硬件實(shí)現(xiàn)方式的介紹 ............................................................................................... 2 第二章 AES 算法的原理研究 ............................................................................................................ 4 分組密碼的研究 ................................................................................................................... 4 AES 加密算法的數(shù)學(xué)理論 ..................................................................................................... 5 含有有限個(gè)元素的域 .................................................................................................. 5 有限域上的多項(xiàng)式及運(yùn)算 ........................................................................................... 5 輪變換與密鑰擴(kuò)展 ............................................................................................................... 7 AES 加密算法工作模式 ...................................................................................................... 10 AES 算法的整體結(jié)構(gòu) ........................................................................................................... 10 本章總結(jié) ........................................................................................................................... 12 第三章 AES 算法模塊的設(shè)計(jì)及仿真 ............................................................................................... 13 開發(fā)環(huán)境介紹 .................................................................................................................... 13 硬件描述語(yǔ)言 (HDL)介紹 .......................................................................................... 13 Modelsim 仿真軟件 .................................................................................................... 13 AES 加密模塊總體架構(gòu) ...................................................................................................... 13 位變換模塊設(shè)計(jì) SubBytes 及 Sbox ..................................................................................... 15 列混合變換模塊設(shè)計(jì) MixColumns....................................................................................... 16 密鑰擴(kuò)展模塊設(shè)計(jì) keysched................................................................................................ 17 加密模塊 Testbench 設(shè)計(jì) ..................................................................................................... 18 第四章 AES 加密系統(tǒng)的綜合與布局布線 ......................................................................................... 20 綜合及布線開發(fā)工具的介紹 ............................................................................................... 20 Synopsys DC ........................................................................................................... 20 Synopsys Astro ........................................................................................................ 20 綜合和布局布線 ................................................................................................................. 20 過(guò)程概述 ...........................................................................................................