【正文】 ten carried out manually and, as a result, are prone to mistakes and subject to interpretation, which of course depends on the skill of the designer. The traditional form of ECS design is performed in two separated domains – the control SW domain and the HW domain – using specific design tools and their respective system models. In the first domain, control engineers define the control laws and the SW engineers write the code that executes the operations required by the control laws. A socalled controlscheduling codesign is performed. Decisions made in the realtime (RT) software design affect the control design, and vice versa. For instance, different SW scheduling policies have different impacts on the latency distributions in the control loops and, consequently, on their performance. Also, the controlloop performance directly affects (by constraining) the SW execution parameters (., sampling periods, taskexecution jitter, etc.).In the second domain the HW engineers design an HWplatform that will execute the control SW. The connections of all the sensors and actuators to the platform are made via the available munication channels. However, because the HW platform is designed separately, control engineers cannot estimate its impact on the controlloop performance. For instance, the data from sensors and to actuators can pass through one or more munication channels. A HW engineer can, in general, choose from among a variety of munication protocols, and each type introduces different latencies and jitter, which therefore affects the SW execution. The control engineer cannot, however, evaluate the effect of these latencies before the system is actually implemented. Hence, the desired performance of the system may not be achieved, and it is necessary to change and tune the control laws (calibration phase) in order to pensate for the impact of these munication and execution delays. The fact that the calibration has to be performed on an actual plant can be very expensive and timeconsuming, especially when the desired performance cannot be achieved using the current HWplatform and a redesign is required. Another shorting of traditional ECS design is the inability of control and SW engineers to exploit some of the advantages offered by modern HW technologies. For instance, control loops running in parallel, instead of the traditional sequential execution, could give better performance. Parallel execution can be achieved with the use of multiprocessor or distributed platforms.Modern ECS design techniques rely heavily on system modeling, which provides a means to examine how various ponents work together and to estimate the impact of the ECS’s implementation on control performance before it is actually implemented. This makes it possible to correct the initial control laws in order to pensate for the implementation impacts early in the design cycle. Another important aspect of modeling is the ability to explore different possible system implementations (designspace exploration). Appropriate modeling can significantly shorten the design cycle of an ECS [2].To overe the problems introduced by the heterogeneity of design models and tools, different methodologies and tools were developed [3]. These methodologies usually provide a means to create a uniform ECS model, simulate and evaluate its behavior, formally transform it towards an implementation, etc. control system designTo improve and accelerate the traditional ECS design we propose the merging of these separated domains. On the basis of this merging, all the actors in the design process could better collaborate and exchange their data during the design process, they could do a more thorough designspace exploration and the design cycle could be made significantly shorter. Instead of developing a new methodology for ECS design, we propose to upgrade the traditional SWbased controlsystem design approach with efficient modeling and design of the HW platforms. Recently, several methodologies have been developed that concern HW/SW codesign. These methodologies enable the efficient design of SW and HW on embedded systems in terms of SW execution speed, HW resources usage, system flexibility, future upgradeability, final design costs, etc. We propose creating a formal bridge between the existing tools for controlscheduling codesign and HW/SW codesign. This bridge makes possible model transformations and the exchange of simulation results between tools for controlscheduling codesign and HW/SW codesign.The bridge is based on a formal transformation of models between different design tools. Our foundation for the control scheduling codesign methodology is work presented in [4] and its associated tool, MoDEST, which is presented in [5]. For the purpose of HW/SW codesign we have selected the methodology presented in [6] with its associated abstractsystem modeling tool, ASyMod, which is presented in [7].With the bridge we are able to obtain more accurate controlperformance evaluations considering architectural details and even the possibility to study mixed HW/SW implementations of the control system. Evaluating the impact of implementation in the early design stages reduces the number of designlifecycle iterations and shortens the time needed for a final calibration of the control laws.In the next section we present the related methodologies, followed by short descriptions of the MoDEST and ASyMod tools and their metamodels. In Section 3 we describe the formal rules for model transformation and the implementation of the bridge. In Section 4, two examples of an embedded controller are presented. By paring simulation results to measurements on a real implemented system, we show the benefits of our approach. Finally, the paper is concluded in Section 5. methodologies and toolsThe increasing need to optimize ECSs in terms of their control performance, RT constraints and cost efficiency has led to limited putational