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t need to reconfigure mouth lines output state. This is because juncture lines output is 1 drive ability is very weak, allowing external devices will its down. When pins for low, it output driving ability, can absorb the considerable current. Quasi twoway mouth have 3 pull_up transistor adapted to different needs. In the three and one transistor, pull up transistor called weak on pull , for 1 and paternal line registers itself pins for 1 open. This pull_up provides basic drive current make prospective twoway mouth for 1 output. If a pin for 1 and output by external devices to drop down to low, pull up close and weak very weak pull_up maintain open position, in order to put this pin for low, strong to pull the external devices must have enough power to make pin infused current threshold voltage of a voltage to the following. Article 2 pull_up transistors, called extremely weak on pull, 1 latch paternal line when open. When pin, the very weak suspended the pull_up source generates very weak and current will pin and high level. Article 3 pull_up transistor called powerful pull. Juncture line latches from 0 to 1, the jumping to accelerate must pull up by logic 0 to twoway mouth logic 1 conversion. When this happened, powerful pull open about 2 machine cycle to make pins can quickly pull to the earth high level. Quasi twoway mouth output shown below. 石家莊鐵道大學(xué)四方學(xué)院 24 STC12C520 series microcontroller 3V device, if the user is in pins plus 5V voltage, there will be a current flow from pins, this has caused additional VDD power consumption. Accordingly, the proposal is not in quasi twoway mouth mode 3V microcontroller pins to exert 5V voltage, such as the use of words, will add current limiting resistor, or using diode do input isolation, or use triode do output segregation. Quasi twoway mouth with a schmidt trigger input and a interference suppression circuit. 2. The pushpull output configuration The dropdown pushpull output configuration opendrain output and the structure and the prospective twoway mouth down same structure, but when latches is 1 provides continuous strong pull up. The pushpull model need more monly used for driving current situation. The pushpull pins configuration are shown below. 石家莊鐵道大學(xué)四方學(xué)院 25 3. Only for input (high resistance) configuration Input port configuration are shown below. Input port with a schmidt trigger input and a interference suppression circuit. 4. Opendrain output configuration Juncture line latches is 0, the opendrain output close all pull_up transistors. When, as a logical output, this configuration mode must have externally pull, usually by resistance receiving V D D outside. This style of dropdown and quasi twoway mouth the same. The jammer line configuration are shown below. Opendrain port with a schmidt trigger input and a interference suppression circuit. A typical transistor control circuit 石家莊鐵道大學(xué)四方學(xué)院 26 If use weak pull_up control, suggestion plus pullup resistors R1 ( K ~ 10K), if not add pullup resistors R 1 ( K ~ 10K), suggest R2 value in the 15K above, or use a strong pushpull output. STC12C5204AD series microcontroller programmable counter array (PCA) PCA contains a special 16 timer, has four 16 bits of capture/parison of module and connected. Each module programmable work In four mode: increase/decrease along the capture, software timer, highspeed output or could be modulated pulse output. Modules connected to (0 CEX0 / PCA0 / PWM0), module 1 connected to (CEX1 / PCA1 / PWM1), modules connected to (2 CEX2 / PCA2 / PWM2), modules connected to (3 CEX3 / PCA3 / PWM3). Register the content of CH and CL is free of 16 PCA increasing count the value of the timer. PCA timer is four modules, the public time benchmark by programming work . Programmable Counter Array 石家莊鐵道大學(xué)四方學(xué)院 27 PCA Timer/Counter CMOD SFR there are 2 bytes and PCA related. They were: CIDL, idle mode allows stop PCA。謝謝!在此再次向馬麗師致以誠摯的謝意和崇高的敬意。他精益求精的工作作風(fēng)在最后的總結(jié)階段再一次幫助了我,讓我對系統(tǒng)的工作原理和整個機(jī)構(gòu)有了系統(tǒng)的認(rèn)知。從畢業(yè)設(shè)計(jì)的剛開始馬老師就給予我細(xì)心的指導(dǎo),馬老師心中一切計(jì)劃都安排的井井有條,這對于我第一次做這些工作有著很好的指導(dǎo)作用。在此謹(jǐn)向馬老師以誠摯的謝意和崇高的敬意。聯(lián)合硬件、軟件來調(diào)試電路。設(shè)計(jì)并制作一款改進(jìn)型的散熱器,帶上溫度傳感器,可以實(shí)現(xiàn)溫度控制 選擇 STC12C5204 單片機(jī),通過比較選擇了溫敏電阻作為溫度檢測工具,來實(shí)現(xiàn)筆記本的溫度收集。其中每個芯片的引腳通過紅藍(lán)兩色的方點(diǎn)來表示此時的引腳電平的高低,紅色表示高電平,藍(lán)色表示低電平。電機(jī)的啟動和停止通過綠色的 LED 表示, LED 亮表示電機(jī)啟動, LED 滅表示電機(jī)停止。 程序的調(diào)試與仿真 單片機(jī)程序通過 Keil C 編輯、編譯成“ *.hex”后,直接用鼠標(biāo)雙擊畫面上的STC12C5204 芯片,把“ *.hex”文件加入。 單片機(jī)系統(tǒng)的仿真是 Proteus VSM 的主要特色。 ISIS 原理設(shè)計(jì)界面支持電路仿真模式。 ISIS 是智能原理圖輸入系統(tǒng),系統(tǒng)設(shè)計(jì)與仿真的基本平臺。 Proteus 是一個基于 PROSPICE 混合模型仿真的、完全嵌入式系統(tǒng)軟硬件設(shè)計(jì)仿真平臺。 石家莊鐵道大學(xué)四方學(xué)院 19 第 7章 系統(tǒng)仿真 仿真軟件 Proteus Proteus 軟件是由英國 Labcenter Electronic 公司開發(fā)的 EDA 工具軟件,已有 20年的歷史,在全球得到了廣泛的應(yīng)用。用 C 語言開發(fā)的代碼基本上可以避免因開發(fā)人員變化石家莊鐵道大學(xué)四方學(xué)院 17 而給項(xiàng)目進(jìn)度或后期維護(hù)、升級帶來的影響,從而保證了整個系統(tǒng)的高品質(zhì)、高可靠性及可升級性。一種功能由一個函數(shù)模塊完成,數(shù)據(jù)交換可方便的約定實(shí)現(xiàn),十分有利于多人協(xié)同進(jìn)行大系統(tǒng)項(xiàng)目的合作開發(fā); ( 4)是可移植性好。 C 語言作為高級語言的特點(diǎn)決 定了它靈活的編程方式,當(dāng)前的很多系列的單片機(jī)都有相應(yīng)的 C 語言級別的仿真調(diào)試系統(tǒng),使它的調(diào)試環(huán)境十分方便; ( 2)生成的代碼編譯效率高。 匯編語言有著執(zhí)行效率高的優(yōu)點(diǎn),但是可移植性和可讀性差,并且本身就是一種編程效率低的低級語言,這些都使它的編程和維護(hù)不方便,從而導(dǎo)致了整個系統(tǒng)的可靠性也較差。由于單片機(jī)應(yīng)用系統(tǒng)的日趨復(fù)雜,要求 所寫的代碼規(guī)范化、模塊化,并便于多人以軟件工程的形式進(jìn)行協(xié)同開發(fā),匯編語言作為傳統(tǒng)的單片機(jī)應(yīng)用系統(tǒng)的編程語言,已經(jīng)不能滿足這樣的實(shí)際需要了。 溫敏電阻程序:溫敏電阻檢測溫度,并且發(fā)送至單片機(jī) PWM 程序:通過 PWM 程序?qū)崿F(xiàn)對風(fēng)扇轉(zhuǎn)速的控制,來實(shí)現(xiàn)筆記本散熱。 空閑和掉電模式外部引腳狀態(tài) 表 44 引腳狀體 模式 程序存儲區(qū) ALE PSEN P0 P1 P2 P3 空閑模式 內(nèi)部 1 1 數(shù)據(jù) 數(shù)據(jù) 數(shù)據(jù) 數(shù)據(jù) 空閑模式 外部 1 1 浮空 數(shù)據(jù) 地址 數(shù)據(jù) 掉電模式 內(nèi)部 0 0 數(shù)據(jù) 數(shù)據(jù) 數(shù)據(jù) 數(shù)據(jù) 掉電模式 外部 0 0 浮空 數(shù)據(jù) 數(shù)據(jù) 數(shù)據(jù) 石家莊鐵道大學(xué)四方學(xué)院 16 第 5章 軟件設(shè)計(jì)及調(diào)試 、軟件設(shè)計(jì) 本設(shè)計(jì)的主程序主要分 3個部分分別是溫敏電阻不封。 、 掉電模式 在掉電模式下,振蕩器停止工作,進(jìn)入掉電模式的指令是最后一條被執(zhí)行的指令,片內(nèi) RAM 和特殊功能寄存器的內(nèi)容在終止掉電模式前被凍結(jié)。需要注意的是,當(dāng)由硬件復(fù)位來終止空閑工作模式時, CPU 通常是從激活空閑模式那條指令的下一條指令開始繼續(xù)執(zhí)行程序的,要完成內(nèi)部復(fù)位操作,硬件復(fù)位脈沖要保持兩個機(jī)器 周期( 24 個時鐘周期)有效,在這種情況下,內(nèi)石家莊鐵道大學(xué)四方學(xué)院 15 部禁止 CPU 訪問片內(nèi) RAM,而允