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農(nóng)業(yè)溫室大棚參數(shù)無線監(jiān)控系統(tǒng)設(shè)計(jì)畢業(yè)論文(參考版)

2025-07-08 14:44本頁面
  

【正文】 Description The AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’ s highdensity nonvolatile memory technology and is patible with the industrystandard MCS51 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microputer which provides a highlyflexible and costeffective solution to many embedded control applications. Function characteristic The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bit timer/counters, a five vector twolevel interrupt architecture, a full duplex serial port, onchip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC: Supply voltage. GND: Ground. Port 0: Port 0 is an 8bit opendrain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification. Port 1 Port 1 is an 8bit bidirectional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal 1 also receives the loworder address bytes during Flash programming and verification. Port 2 Port 2 is an 8bit bidirectional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 31 頁 共 48 頁 external data memory that use 8bit addresses, Port 2 emits the contents of the P2 Special Function 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8bit bidirectional I/O port with internal Port 3 output buffers can sink。 掉電模式 在掉電模式下,振蕩器停止工作,進(jìn)入掉電模式的指令是最后一條被執(zhí) 行的指令,片內(nèi) RAM和特殊功能寄存器的內(nèi)容在中指掉電模式前被凍結(jié)。二是通過硬件復(fù)位也可將閑散工作模式終止。終止閑散工作模式的方法有兩種,一是任何一條被允許中斷的事件被激活, IDL 被硬件清除,即刻終止閑散工作模式。此時(shí),片內(nèi)隨機(jī)存取數(shù)據(jù)存儲(chǔ)器和所有特殊功能寄存器的內(nèi)容保持不變。如需要同時(shí)進(jìn)入兩種工作模式,即 PD 和 IDL 同時(shí)為 1,則先激活掉電模式。 PD 是掉電模式,當(dāng) PD=1 時(shí),激活掉電工作模式,單片機(jī)進(jìn)入掉電工作狀態(tài)。 閑散節(jié)電模式 AT89C51 有兩種可用軟件編程的省電模式,它們是閑散模式和掉電工作模式。 10PF 這種情況下,外部時(shí)鐘脈沖接到XTAL1 端,即內(nèi)部時(shí)鐘發(fā)生器的輸入端, XTAL2 則懸空。如果使用石英晶體,我們推薦電容使用30PF177。 外接石英晶體及電容 C1, C2 接在放大器的反饋回路中構(gòu)成并聯(lián)震蕩電路。 時(shí)鐘震蕩器 AT89C51 中有一個(gè)用于構(gòu)成內(nèi)部震蕩器的高增益反相放大器,引腳 XTAL1和 XTAL2 分別是該放大器的輸入端和輸出端。 XTAL1:震蕩器反相放大器及內(nèi)部時(shí)鐘發(fā)生器的輸入端。如 EA 端為高電平, CPU 則執(zhí)行內(nèi)部程序存儲(chǔ)器中的指令。欲使中央處理器僅訪問外部程序存儲(chǔ)器, EA 端必須保持低電平。在此期間,當(dāng)訪問外部數(shù)據(jù)存儲(chǔ)器時(shí),這兩次有效的 PSEN 信號(hào)不出現(xiàn)。此外,這個(gè)引腳會(huì)微弱拉高,單片機(jī)執(zhí)行外部程序時(shí),應(yīng)設(shè)置 ALE 無效。如果必要,可對特殊寄存器區(qū)中的 8EH 單元的 D0位置禁止 ALE 操作。即使不訪問外部存儲(chǔ)器, ALE 以時(shí)鐘震 蕩頻率的 1/16 輸出固定的正脈沖信號(hào),因此它可對輸出時(shí)鐘陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 29 頁 共 48 頁 或用于定時(shí)目的。當(dāng)震蕩器工作時(shí), RET 引腳出現(xiàn)兩個(gè)機(jī)器周期以上的高電平將使單片機(jī)復(fù)位。對P3 口寫如“ 1”時(shí),它們被內(nèi)部電阻拉到高電平并可作為輸入端時(shí),被外部拉低的 P3 口將用電阻輸出電流。 閃爍編程或校驗(yàn)時(shí), P2 口接收高位地址和其它控制信號(hào)。在訪問外部程序存儲(chǔ)器或 16 位地址的外部數(shù)據(jù)存儲(chǔ)器時(shí), P2 口送出高 8 位地址數(shù)據(jù)。對端口寫“ 1”,通過內(nèi)部的電阻把端口拉到高電平,此時(shí),可作為輸入口。閃爍編程時(shí)和程序校驗(yàn)時(shí), P1 口接收低 8 位地址。對端口寫“ 1”,通過內(nèi)部 的電阻把端口拉到高電平,此時(shí)可作為輸入口。 P0 口在閃爍編程時(shí), P0 口接收指令,在程序校驗(yàn)時(shí),輸出指令,需要接電阻。當(dāng)“ 1”被寫入 P0 口時(shí),每個(gè)管腳都能夠作為高阻抗輸入端。 引腳 描述 VCC:電源電壓 GND:地 P0 口 : P0 口是一組 8 位漏極開路雙向 I/O 口,即地址 /數(shù)據(jù)總線復(fù)用口。閑散方式停止中央處理器的工作,能夠允許隨機(jī)存取數(shù)據(jù)存儲(chǔ)器、定時(shí) /計(jì)數(shù)器、串行通信口及中斷系統(tǒng)繼續(xù)工作。 功能特性 AT89C51 提供以下的功能標(biāo)準(zhǔn): 4K 字節(jié)閃爍存儲(chǔ)器, 128 字節(jié)隨機(jī)存取數(shù)據(jù)存儲(chǔ)器, 32 個(gè)I/O 口, 2 個(gè) 16 位定時(shí) /計(jì)數(shù)器, 1個(gè) 5 向量兩級(jí)中斷結(jié)構(gòu), 1 個(gè)串行通信口,片內(nèi)震蕩器和時(shí)鐘電路。和 128 字節(jié)的存取數(shù)據(jù)存儲(chǔ)器( RAM),這種器件采用 ATMEL 公司的高密度、不容易丟失存儲(chǔ)技術(shù)生產(chǎn),并且能夠與 MCS51 系列的單片機(jī)兼容。 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 27 頁 共 48 頁 參考文獻(xiàn) [1] 高職富 .溫室環(huán)境控制技術(shù)的現(xiàn)狀及發(fā)展前景 [J].中國市場 ,20xx 年第 35 期 :106107 [2] 吉紅 .自動(dòng)控制在國外設(shè)施農(nóng)業(yè)中的應(yīng)用 [J].農(nóng)業(yè)環(huán)境與發(fā)展 ,20xx(5):5254 [3]陳桂友,柴遠(yuǎn)斌.單片機(jī)應(yīng)用技術(shù) [M].北京:機(jī)械工業(yè)出版社, 20xx, 1088. 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Basic concept of IEC 61499[C].Fachtagung Verteilte Automat isierung,Magdeburg DE,20xx:22 23 [14] IEC 65/240/CD,Function blocks for industrial process measurement and control systems Part 1:Architecture[S].1999 [15] IEC 61499 2 (and Committee Draft to be published),Function blocks for industrial process measurement and control systems Part 2:Engineering Ta
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