【正文】
20%.The surge wave shall be defined in ANSI/(1980) and IEC 602(1973).three positive and three negative surges shall be applied at 0,90,180, and 270 degrees(24 total). The time interval between surges shall be 18 seconds.可 靠 度 測 試 規(guī) 範(fàn)Reliability Test Specification編號No.WI7308修訂日期Amendment Date版本Version頁次Page25發(fā)行日期Release Date 100 nanosecond pulse with an amplitude of 400 volts shall be superimposed on the peak of the : error free nominal input voltage and repeated at the line frequency for ten(10) minutes. power supply shall suffer no physical damage under the following disurbances in AC line voltage. Repeat each test five times,returning the power supply : damage free to its normal running conditions between plete line outage for any duration. power supply shall suffer no physical damage under the following disturbances in AC line voltage. Repeat each test five times,returning the power supply : damage free to its normal running conditions between tests. A line input undervoltage of 65% below the nominal of any duration of 5 seconds or less. power supply shall not latch up with the following line conditions:80% under voltage below the nominal : error free for 60 milliseconds or longer. power supply shall not latch up with the following line conditions:100% under voltage below the nominal : error free for 60 milliseconds or longer.可 靠 度 測 試 規(guī) 範(fàn)Reliability Test Specification編號No.WI7308修訂日期Amendment Date版本Version頁次Page26發(fā)行日期Release DatePROGRAM:54100V2 V 20S 20S 20S99V98V0 VPROGRAM:53 20S 20S 20S100VRepeat 2 timesDROP TIME:90ms,130ms,200ms,280ms,400ms,600ms,900ms,2S 40ms 25ms200V200V200V200ns200nsV1V1V12S2S2S2S200ns200V 60msDROP TIME:90ms,130ms,200ms,280ms,400ms,600ms,900ms,2S 60ms 40ms 25ms100V100V100V200ns200nsV1V1V12S2S2S2S200ns100VRepeat 2V146:120V47:100V48:80V49:60V50:40V51:20V52:0VPROGRAV139:60V40:50V41:40V42:30V43:20V44:10V45:0VTEST WAVEFORM 可 靠 度 測 試 規(guī) 範(fàn)Reliability Test Specification編號No.WI7308修訂日期Amendment Date版本Version頁次Page27發(fā)行日期Release Date240V2882S240V127V127V2S3837100V 68V100V36 68V200V 136V200V35 136V200V 0V200V34 0V100V 0V100V33 0V2S200V 150V2S200V 150V 75V100V2S 75V2S100V3231TEST WAVEFORMTEST WAVEFORMPROGRAMPROGRAM WI420102A。10% and 2KV peak177。100HZ exponentially decaying sinusoid with a peak voltage equal to the peak nominal line volage : error free and decay time constant such that the fifth halfcycle of the disturbance is between 15 and 25% of the first halfcycle. The total duration of the disturbance shall not exceed one cycle of the line test shall be repeated 320 times (80 positive rings and 80 negative rings at 400HZ???靠 度 測 試 規(guī) 範(fàn)Reliability Test Specification編號No.WI7308修訂日期Amendment Date版本Version頁次Page24發(fā)行日期Release Date 21. PLD test(輸入瞬斷測試): undervoltage of 25% below the minimum input voltage, applied for two seconds,repeated 10 times : error free with a 10% duty cycle. undervoltage of 35% below the minimum nominal