電氣外文翻譯---基于dsp高速無刷直流電機(jī)控制使用直流環(huán)節(jié)電壓控制-電氣類(參考版)
2025-05-16 20:23本頁面
【正文】 interval. Unless the resolution of the pulse width is considerably high, this may result in a speed ripple at steady state and degrade the accuracy of the position signal detection. This problem is more serious at a higher speed region and can be effectively overe by controlling the voltage and frequency independently by the DC link voltage control scheme. 7 Figure 1. Relation between the PWM switching period and mutating instant:(a) Ideal mutation, (b) Case of mutation delay, and (c) Case of irregular switching frequency. 。 sec at 50,000 rpm,if the switching frequency is chosen as 16 kHz, the number of PWM pulses during 60175。interval. Since a 60176。 sec. This mutating delay can be reduced by increasing the PWM switching frequency. In practice, however, the switching frequency cannot be increased without limit because of the increased switching loss. Also, the switching frequency of mercially available power devices is less than 20 kHz. Thus, to avoid an undesirable mutation delay, the next inverter sequence has to be applied as soon as the mutation signal interrupt occurs. Then, the present PWM period has to be terminated and the new PWM period synchronized with the mutation interrupt signal must be started. In the upper and lower switch PWM schemes,this may yield an irregular switching frequency much larger than f s under a high duty condition as shown in Figure 1(c) . In the ongoing and offgoing phase PWM schemes, this irregular switching frequency does not 6 occur since the phase executing the PWM is continually changed every 60176。interval, and in the offgoing phase PWM scheme, vice versa [3, 4].In the upper switch PWM scheme, the PWM is executed only on the upper one of two active switches, and in the lower switch PWM scheme, vice versa. Depending on the 5 used PWM scheme, this control technique may cause a mutation delay or an irregular switching frequency of the power devices in a high speed sensorless control. Figure 1 shows the relation between the PWM switching period and mutating instant in the 2phase excitation PWM scheme. In Figure 1, Ts and fs denote the PWM switching period and frequency, respectively. Figure 1(a) shows a case of the ideal mutation. As can be seen in the gure, if the mutating instant is synchronized with the end of the PWM switching period, an ideal mutation can be obtained without any delay in the inverter sequence change. However,since the mutating instant depends on the rotor position, it does not usually coincide with the end of the PWM period. In this case, the mutation can be performed synchronized with the end of the present PWM period to start a next inverter sequence as Figure 1(b) , which is the normally used method. This results in an undesirable mutation delay and the maximum value of this delay bees the PWM switching period. If the switching frequency is chosen as 16 kHz,the maximum value of the mutation delay will be period, if the counter clock in DSP is TC and the number of count during 60 degrees is a, the mechanical rotor speed can be puted in rpm as follows: where P is the number of poles. 3. Problems of Existi
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