【正文】 XTAL2： Output from the inverting oscillator amplifier. / EA /VPP： External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. When / EA to maintain low, then during this period the external program memory (0000HFFFFH), regardless of whether an internal program memory. This pin also receives the 12volt programming enable voltage (VPP) during Flash programming, for parts that require 12volt VPP. ALE/ PROG : Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input ( PROG ) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALEdisable bit has no effect if the microcontroller is in external execution mode. s sake. Port 3 also serves the functions of various special features of the AT89C51 as listed below: Port 3 also receives some control signals for Flash programming and verification. Port 2: Port 2 is an 8bit bidirectional I/O port with internal pull ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory which uses 16bit addresses (MOVX DPTR). In this application, it uses strong internal pull ups when emitting 1s. During accesses to external data memory which uses 8bit addresses (MOVX RI). Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 0: Port 0 is an 8bit opendrain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/bus during accesses to external program and data memory. In this mode P0 has internal pull ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull ups are required during program verification. VCC: Supply voltage Fullduplex UART serial port interrupt line Lowpower idle and Powerdown modes Six interrupt source 32 programmable I/O lines Threelevel program memory lock Data retention time: 10 years 4K bytes of insystem reprogrammable Flash memory Introduction of AT89C51 Description: The AT89C51 is a lowpower, highperformance CMOS 8bit microputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard MCS51 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the ATMEL Co.’s AT89C51 is a