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畢業(yè)設(shè)計(jì)-自行車?yán)锍膛c速度計(jì)的設(shè)計(jì)-資料下載頁

2024-12-03 18:21本頁面

【導(dǎo)讀】[摘要]設(shè)計(jì)主要闡述一種基于霍爾元件的自行車速度里程表的設(shè)計(jì)。以STC89C51單片機(jī)為核心,A44E霍爾傳。感器測轉(zhuǎn)數(shù),實(shí)現(xiàn)對自行車?yán)锍?速度的測量,采用LCD1602顯示自行車的里程數(shù)及速度。文章詳細(xì)介紹了自行車的。硬件部分利用霍爾元件將自行車每轉(zhuǎn)一圈的脈沖數(shù)傳入單片機(jī)系統(tǒng),然后單片機(jī)系統(tǒng)將信。號經(jīng)過處理送顯示。軟件部分用C語言進(jìn)行編程,采用模塊化設(shè)計(jì)思想。該系統(tǒng)硬件電路簡單,子程序具有通用性,完全符合設(shè)計(jì)要求。樂、休閑、鍛煉的首選。

  

【正文】 curate twoway function with P1 mouth just, can also use the second function of every pin, and door 3 function one switch in fact, it determines to be to output data of latch to output second signal of function. Act as W =At 1 o39。clock, output Q end signal。 Act as Q =At 1 o39。clock, can output W line signal . At the time of programming, it is that the first function is still the second function but needn39。t have software that set up P3 mouth in advance . It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location (the location or the byte ) to visit to P3 mouth /at not lasting lining, there are inside hardware latch Qs = operation principle of P3 mouth is similar to P1 mouth. Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 onechip puters as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 21 頁 共 57 頁 collector too or drainsource resistance is it urge to open a way, do not need to have the resistance of drawing outerly . Mouths are all accurate twoway mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 onechip puter, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an onechip puter. Its main function is to turn PC into 0000H initially , make the onechip puter begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there aren39。t mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration sho uld exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal: Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST ) hand over to Schmitt39。s trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of onechip puter system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop one39。s head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change. 陜西理工學(xué)院畢業(yè)設(shè)計(jì) 第 22 頁 共 57 頁 結(jié)構(gòu)和功能的 MCS51系列 在 MCS51系列單片機(jī)的結(jié)構(gòu)和功能是一塊英特爾公司生產(chǎn)的單片機(jī)系列的名稱。本公司引進(jìn) 8高檔的 MCS51系列單片機(jī)在 1980年在 1976年引入 MCS48系列 8位單片機(jī)后,它屬于很多種此行單片機(jī)的芯片有如 8051, 8031, 8751, 80C51BH, 80C31BH等,其基本組成,基本性能和指令系統(tǒng)都是一樣的。 8051每天 representatives 51系列單片機(jī)。 一個(gè)單片機(jī)系統(tǒng)由以下幾部分組成:( 1) 8( CPU)的一個(gè)微處理器。 ( 2)在片數(shù)據(jù)存儲器RAM( 128B / 256B),它使用的不是 depositting不能夠讀取 /數(shù)據(jù)寫入,如運(yùn)算的結(jié)果不是中間,最后的結(jié)果和數(shù)據(jù)想展示等。( 3)程序存儲器 ROM / EPROM( 4KB / 8KB),用來保存的程序,一些初始數(shù)據(jù),并形成于片。但是,不采取 ROM /一些單片機(jī)內(nèi)的 EPROM,如 8031, 8032, 80℃等。( 4)并排四我跑 8側(cè) / O接口 P0 4 P3,每個(gè)口可以作為引進(jìn)使用,可用作出口了。 ( 5)兩個(gè)定時(shí)器 /計(jì)數(shù)器,每個(gè)定時(shí)器 /計(jì)數(shù)器可以建立和計(jì)數(shù)的方式,用于計(jì)算到外部事件,可以設(shè)置成一個(gè)定時(shí)方式太,并且可以根據(jù)計(jì)數(shù)或計(jì)時(shí)的結(jié)果實(shí)現(xiàn)控制計(jì)算機(jī)。 ( 6)五切斷切斷源的控制系統(tǒng)。 ( 7)一個(gè)全雙工的串行 I / UART的 O口(通用異 步接收器 /發(fā)送器( UART)),它是實(shí)現(xiàn)單芯片的計(jì)算機(jī)或單片機(jī)與計(jì)算機(jī)的串行通信使用。 ( 8)拉伸振蕩器和時(shí)鐘產(chǎn)生電路,石英晶體微調(diào)電容需要外?,F(xiàn)在最多允許振蕩頻率為 12 megahertas。每個(gè)上述部分是通過內(nèi)部數(shù)據(jù)總線。其中接合, CPU是單片機(jī)的核心,它是計(jì)算機(jī)和指揮中心的控制下,由作為運(yùn)算裝置和控制裝置的上述部分,等運(yùn)算單元可以進(jìn)行運(yùn)算和單位邏輯運(yùn)算的 ALU的 8人,而其中之一, 8 1存儲設(shè)備temporarilies,存儲設(shè)備 2暫時(shí), 8的累積裝置 ACC,寄存器 B和程序狀態(tài)寄存器 PSW,等人誰 2輸入積 累 ACC計(jì)數(shù)輸入端等檢查暫時(shí)經(jīng)常為一體的運(yùn)作,來自誰儲存 1的操作是它使操作去上暫時(shí)算人,經(jīng)營成果和環(huán)回 ACC與另一個(gè)。此外, ACC往往被視為數(shù)據(jù)傳輸?shù)?8051里面的中轉(zhuǎn)站。同一般的微處理器,它是最繁忙的寄存器。不禁想起以 A同意的順序表示。控制器包括程序計(jì)數(shù)器,順序是 depositted,順序譯碼,振蕩器和定時(shí)電路等的程序計(jì)數(shù)器是由 8個(gè)計(jì)數(shù)器的 2臺,相當(dāng)于 16是該過程的一個(gè)字節(jié)地址計(jì)數(shù)器實(shí)際上,內(nèi)容是將在個(gè)人計(jì)算機(jī)中進(jìn)行的下一個(gè)執(zhí)行機(jī)構(gòu)。從而改變它可以改變程序執(zhí)行的方向內(nèi)容。搖電路 8051單片機(jī),只需要外部石 英晶體和頻率微調(diào)電容,其頻率范圍為 12MHZ。該脈沖信號,作為工作的 8051基本節(jié)拍,即時(shí)間的最小單元。 8051是一樣的其他計(jì)算機(jī),基本節(jié)拍的控制下,在和諧的工作,就像一個(gè)管弦樂隊(duì)根據(jù)該被指令的節(jié)拍發(fā)揮。 有 ROM(程序存儲器,只能讀取)和 RAM 8051片(數(shù)據(jù)存儲器,可就是它可以寫 入)二讀,它們有各自獨(dú)立的內(nèi)存地址空間,配置方式與計(jì)算機(jī)的通用存儲器一樣。 8051程序內(nèi)存和 8751片程序存儲器容量為 4KB,地址從 0000H開始,用于存放程序和形式不變。數(shù)據(jù) 8051存儲器數(shù)據(jù)存儲器 128B的 8751 8031,解決虛假 00FH,用于中間結(jié)果以沉積操作中,數(shù)據(jù)被暫時(shí)存儲和數(shù)據(jù)被緩沖等。在此 128B的 RAM,有 32個(gè)字節(jié)單元,其能被任命為工作寄存器,這和一般的微處理器不同的是, 8051片 RAM和工作寄存器級編隊(duì),安排的位置是一樣的。不是很該 MCS51系列的單片機(jī)和一般的計(jì)算機(jī)的存儲器中處置另外的方式是相同的。為第一地址空間, ROM和 RAM的一般的計(jì)算機(jī)可以在該地址隨意, ROM和 RAM的即地址范圍內(nèi)的不同空間排列,與地層中的分配不同的地址空間。在訪問存儲器,對應(yīng)和僅一個(gè)地址存儲器 單位,可 ROM中,也可以是 RAM的太,并通過訪問順序類似。這種存儲器結(jié)構(gòu)的被稱作普林斯頓的結(jié)構(gòu)。 8051存儲器分為程序內(nèi)存空間和數(shù)據(jù)存儲器空間上的物理結(jié)構(gòu)中,有四個(gè)存儲空間中的所有:在一個(gè)與數(shù)據(jù)存儲器之外的數(shù)據(jù)存儲空間,一個(gè)在程序存儲器空間和一個(gè)外之一,結(jié)構(gòu)的程序存儲這種過程設(shè)備和數(shù)據(jù)存儲器分離表單數(shù)據(jù)存儲器,被稱為哈佛結(jié)構(gòu)形式。但是,使用用戶的角度來看, 8051的內(nèi)存地址空間分為三種:片外( 1)在切片,安排 FFFFH,地點(diǎn) 0000H塊,齊聲(使用 16個(gè)地址)。 ( 2)外 64KB之一所
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