eda技術與應用講義第3章原理圖輸入設計方法quartusii版本-資料下載頁
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【正文】 mation. You can use Tcl mands and scripts to control simulation and to provide vector stimuli. You can also provide vector stimuli in a Vector Waveform File (.vwf) or a textbased Vector File (.vec). This type of simulation also allows you to check setup and hold times, detect glitches, and check simulation coverage (the ratio of output ports actually toggling between 1 and 0 during simulation, pared to the total number of output ports present in the list). ? Timing using Fast Timing Model ? Performs a timing simulation using the Fast Timing Model to simulate fastest possible timing conditions with the fastest device speed grade Megafunctions/LPM 1. Arithmetic Components 2. Gates 3. I/O Components 4. Memory Compiler 5. Parallel Flash Loader Megafunction 6. SignalTap II Logic Analyzer Megafunction 7. Storage Components Arithmetic Components 1. altaccumulate divide* 2. altfp_add_sub lpm_abs 3. altfp_mult lpm_add_sub 4. altmemmult lpm_pare 5. altmult_accum lpm_counter 6. altmult_add lpm_divide 7. altsqrt lpm_mult 8. altsquare parallel_add Gates 1. busmux lpm_inv 2. lpm_and lpm_mux 3. lpm_bustri lpm_or 4. lpm_clshift lpm_xor 5. lpm_constant mux 6. lpm_decode I/O Components 1. altcdr_rx altdqs 2. altcdr_tx altgxb 3. altclkctrl altlvds_rx 4. altclklock altlvds_tx 5. altddio_bidir altpll 6. altddio_in altpll_reconfig 7. altddio_out altremote_update 8. altdq altufm_osc ? Memory Compiler 1. altcsmem (FIFO partitioner) Parallel Flash Loader Megafunction 1. parallel_flash_loader SignalTap II Logic Analyzer Megafunction 1. sld_signaltap Storage Components 1. alt3pram scfifo 2. altcam lpm_ff 3. altdpram* lpm_fifo* 4. altqpram lpm_fifo_dc* 5. altshift_taps lpm_latch 6. altsyncram lpm_ram_dp 7. altufm_i2c lpm_ram_dq 8. altufm_none lpm_ram_io 9. altufm_parallel lpm_rom 10. altufm_spi lpm_shiftreg 11. csdpram* lpm_dff* 12. csfifo* lpm_tff* 13. dcfifo Primitives 1. Buffer Primitives 2. Flipflop Latch Primitives 3. Input Output Primitives/Ports 4. Logic Primitives 5. Other Primitives (Block Design Files only) Buffer Primitives 1. CARRY LUT_INPUT 2. CARRY_SUM LUT_OUTPUT 3. CASCADE OPNDRN 4. CLKLOCK SOFT 5. EXP TRI 6. GLOBAL WIRE 7. (Block Design Files only) 7. LCELL ROW_GLOBAL Flipflop Latch Primitives 1. DFF 2. LATCH 3. DFFE 4. SRFF 5. DFFEA 6. SRFFE 7. DFFEAS 8. TFF 9. JKFF 10. TFFE 11. JKFFE Input Output Primitives/Ports 1. BIDIR or INOUT 2. INPUT or IN 3. OUTPUT or OUT Logic Primitives 1. AND 2. NOR 3. BAND (Block Design Files only) 4. NOT 5. BNAND (Block Design Files only) 6. OR 7. BNOR (Block Design Files only) 8. VCC (Block Design Files only) 9. BOR (Block Design Files only) 10. XNOR 11. GND (Block Design Files only) 12. XOR 13. NAND Other Primitives (Block Design Files only) 1. CONSTANT PARAM 演講完畢，謝謝觀看！
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