【導(dǎo)讀】長(zhǎng)，每天都要處理很多和個(gè)人有關(guān)的信息，而這些信息管理非常不便。因此，在現(xiàn)實(shí)生活中。IC卡的應(yīng)用范圍十分廣泛，它有助于我們解決問(wèn)題。IC卡讀寫(xiě)器是IC卡和計(jì)算機(jī)之間的傳。系列IC卡進(jìn)行讀/寫(xiě)控制。接觸式IC卡是IC卡領(lǐng)域的一項(xiàng)新技術(shù),它是射頻識(shí)別技術(shù)和IC. 卡技術(shù)相結(jié)合的產(chǎn)物。由于這里不能上傳完整的畢業(yè)設(shè)計(jì)（完整的應(yīng)包括畢業(yè)設(shè)計(jì)說(shuō)明書(shū)、首先在緒論中論述課題的開(kāi)發(fā)意義和概述其功能。原理圖，闡述了本次畢業(yè)設(shè)計(jì)所采用的各硬件接口技術(shù)和各個(gè)接口模塊的功能及工作過(guò)程。本系統(tǒng)是以單片機(jī)的基本語(yǔ)言匯編C51語(yǔ)言來(lái)實(shí)現(xiàn)軟件設(shè)計(jì)，指令的執(zhí)行速度快。最后具體描述了各個(gè)功能模塊的軟、硬件調(diào)試。智能IC卡和普通磁卡相。前使用最廣泛的是接觸式IC卡，本文對(duì)其進(jìn)行了詳細(xì)介紹。COS受IC卡存儲(chǔ)容量和微處理器性能的限制,主要功能是:控制IC卡。因此智能IC卡具有超強(qiáng)的存儲(chǔ)性。能,并提供保證了很高的信息安全性和可靠性及便于攜帶。

　　

【正文】 ly Memory (PEROM) and 128 bytes RAM. The device is manufactured using Atmel’s high density nonvolatile memory technology and is patible with the industry standard MCS51? instruction set and pinout. The chip bines a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microputer which provides a highly flexible and cost effective solution to many embedded control applications. Features: ? Compatible with MCS51? Products ? 4K Bytes of InSystem Reprogrammable Flash Memory ? Endurance: 1,000 Write/Erase Cycles ? Fully Static Operation: 0 Hz to 24 MHz ? ThreeLevel Program Memory Lock ? 128 x 8Bit Internal RAM ? 32 Programmable I/O Lines ? Two 16Bit Timer/Counters ? Six Interrupt Sources ? Programmable Serial Channel ? Low Power Idle and Power Down Modes The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bit timer/counters, a five vector twolevel interrupt architecture, a full duplex serial port, onchip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Block Diagram Pin Description: VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When is are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification. Port 1 Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the loworder address bytes during Flash programming and verification. Port 2 Port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX @ DPTR). In this application it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below: Port pin alternate functions rxd (serial input port) txd (serial output port) ^int0 (external interrupt0) ^int1 (external interrupt1) Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALEdisable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12volt programming enable voltage(VPP) during Flash programming, for parts that require 12volt VPP. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifie