簡(jiǎn)易樂(lè)曲演奏器的設(shè)計(jì)-資料下載頁(yè)
2025-06-30 09:12本頁(yè)面
【正文】 sbeginprocess(index)begin 為個(gè)音符賦初始值以便進(jìn)行分頻case index is when 5=tone=771。code=5。code1=0。when 6=tone=911。code=6。code1=0。 when 8=tone=1091。code=1。code1=1。when 9=tone=1196。code=2。code1=1。when 10=tone=1289。code=3。code1=1。 when 11=tone=1331。code=4。code1=1。when 12=tone=1409。code=5。code1=1。when 13=tone=1479。code=6。code1=1。when 14=tone=1541。code=7。code1=1。when others=NULL。end case。end process。end 。自動(dòng)/手動(dòng)library ieee。use 。entity bmux isport(d1,d2:in integer range 0 to 15。cs,rst:in std_logic。q:out integer range 0 to 15)。 end。architecture bhv of bmux isbegin process(cs,rst)beginif rst=39。139。 then 復(fù)位時(shí)輸出為0 q=0。elsecase cs iswhen 39。039。=q=d1。 選擇手動(dòng)輸入when 39。139。=q=d2。 選擇自動(dòng)演奏when others=q=d1。end case。end if。end process。end。數(shù)控分頻器library ieee。use 。entity skfpq isport(clk:in std_logic。tone:in integer range 0 to 2047。spks:out std_logic)。end。architecture bhv of skfpq issignal preclk:std_logic。signal fullspks:std_logic。begin process(clk)variable count4:integer range 0 to 15。begin preclk=39。039。if count4=12 then 將基準(zhǔn)頻率進(jìn)行12分頻preclk=39。139。count4:=0。elsif clk39。event and clk=39。139。 then count4:=count4+1。end if。end process。process(preclk,tone)variable count11:integer range 0 to 2047。begin if preclk39。event and preclk=39。139。 then 按分頻系數(shù)進(jìn)行分頻 if count11=2047 thencount11:=tone。fullspks=39。139。 else count11:=count11+1。fullspks=39。039。 end if。end if。end process。process(fullspks)variable count2:std_logic。beginif fullspks39。event and fullspks=39。139。 thencount2:=not count2。 if count2=39。139。 then spks=39。139。 elsespks=39。039。 end if。end if。end process。end。頂層library ieee。use 。entity bfq isport(clk1:in std_logic。CS:in std_logic。RST:in std_logic。D2:in integer range 0 to 15。oup1:out std_logic。oup2:out integer range 0 to 15。oup3:out integer range 0 to 15)。end。architecture bhv of bfq issignal s1: integer range 0 to 15。signal s2: integer range 0 to 15。signal s3: integer range 0 to 2047。signal s4: std_logic。ponent fpqisPort(clk:in std_logic。Out1:out std_logic)。End ponent。ponent ydfsq isport(clk:in std_logic。toneindex:out integer range 0 to 15)。end ponent。ponent ydbmq isport(index:in integer range 0 to 15。code:out integer range 0 to 15。code1:out integer range 0 to 15。tone:out integer range 0 to 2047)。end ponent。ponent bmux isport(d1,d2:in integer range 0 to 15。cs,rst:in std_logic。q:out integer range 0 to 15)。 end ponent。ponent skfpq isport(clk:in std_logic。tone:in integer range 0 to 2047。spks:out std_logic)。end ponent。beginu0:fpq port map(clk1,s4)。u1: ydfsq port map(s4,s1)。u2:ydbmq port map(s2,oup2,oup3,s3)。u3:bmux port map(s1,D2,CS,RST,s2)。u4:skfpq port map(clk1,s3,oup1)。end
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