【正文】 采用雙列直插8 腳塑料封裝（DIP8）和微形的雙列8 腳塑料封裝（SOP8） LM393內(nèi)部結(jié)構(gòu)圖(3) 應(yīng)用說明LM393是高增益,寬頻帶器件，象大多數(shù)比較器一樣，如果輸出端到輸入端有寄生電容而產(chǎn)生耦合，則很容易產(chǎn)生振蕩。這種現(xiàn)象僅僅出現(xiàn)在當(dāng)比較器改變狀態(tài)時，輸出電壓過渡的間隙，電源加旁路濾波并不能解決這個問題，標(biāo)準(zhǔn)PC板的設(shè)計對減小輸入—輸出寄生電容耦合是有助的。減小輸入電阻至小于10K將減小反饋信號，而且增加甚至很小的正反饋量(~10mV)能導(dǎo)致快速轉(zhuǎn)換,使得不可能產(chǎn)生由于寄生電容引起的振蕩，除非利用滯后，否則直接插入IC(集成電路板integrated circuit，縮寫：IC) 并在引腳上加上電阻將引起輸入—輸出在很短的轉(zhuǎn)換周期內(nèi)振蕩，如果輸入信號是脈沖波形，并且上升和下降時間相當(dāng)快，則滯回將不需要。 比較器的所有沒有用的引腳必須接地。 LM393偏置網(wǎng)絡(luò)確立了其靜態(tài)電流與電源電壓范圍 ~30V無關(guān)。 通常電源不需要加旁路電容。 差分輸入電壓可以大于Vcc并不損壞器件。 LM393的輸出部分是集電極開路，發(fā)射極接地的 NPN輸出晶體管，可以用多集電極輸出提供或OR ing(4) 主要功能輸出負(fù)載電阻能銜接在可允許電源電壓范圍內(nèi)的任何電源電壓上，不受 (當(dāng)不用負(fù)載電阻沒被運用)，(16mA)時，輸出晶體管將退出而且輸出電壓將很快上升。輸出飽和電壓被輸出晶體管大約60ohm 的γSAT限制。當(dāng)負(fù)載電流很小時,輸出晶體管的低失調(diào)電壓()允許 輸出箝位在零電平。6 統(tǒng)軟件模塊設(shè)計 軟件設(shè)計在本系統(tǒng)中占有很大的比重，它的功能主要可以分成負(fù)責(zé)LED的顯示、安全燈的自動轉(zhuǎn)換、輸入的信號采集程序等。 軟件實現(xiàn)的總框圖 軟件實現(xiàn)的總框圖 按鍵處理程序流程圖 中斷服務(wù)程序流程圖 中斷服務(wù)程序流程圖參考文獻(xiàn)[1],北京：高等教育出版社，2004[2], 北京：機械工業(yè)出版社，2004[3],西安：西安電子科技大學(xué)出版社，2007[4] 99 SE原理圖與PCB設(shè)計教程,北京：電子工業(yè)出版社，2007[5]（Protel99SE）實訓(xùn)指導(dǎo)書,西安：西安電子科技大學(xué)出版社，2007[6],北京：航空航天大學(xué)出版社，2000[7],北京：航空航天大學(xué)出版社，1999[8],哈爾濱：哈爾濱工業(yè)大學(xué)出版社，1997[9],北京：人民郵電出版社，1999[10],北京：航空航天出版社，2000[11] Family of Single Chip Microputer User’s Manual,1990[12],武漢：華中理工大學(xué)出版社，1999[13]，北京：航空航天大學(xué)出版社，1998致謝畢業(yè)設(shè)計能夠如期完成，我的指導(dǎo)老師高麗麗老師給了我極大的幫助與支持。高老師學(xué)識淵博，學(xué)風(fēng)嚴(yán)謹(jǐn)，待人寬厚。在我遇到困難時能耐心解答直至我明白。尤其在我剛拿到一個帶有陌生專業(yè)術(shù)語的題目想退縮時，高老師的一翻教導(dǎo)令我受益匪淺。讓我明白，沒有付出，就沒有回報的真諦。還有，人要不斷的接受新知識，學(xué)習(xí)新知識，這樣才能在以后的人生道路上堅強的走下去。高老師要指導(dǎo)很多同學(xué)的論文，加上本來就有教學(xué)任務(wù)，工作量之大可想而知，而我對于單片機來說，是個初學(xué)者。所以，在設(shè)計的過程中，遇到很小的問題，都要勞煩老師講解。在不斷的接觸中，高老師的樸實無華，平易近人的性格對我影響頗深。在高老師的指導(dǎo)和鼓勵下，我才有信心去完成畢業(yè)設(shè)計，所以我很榮幸成為高老師的學(xué)生。除高老師之外，還要感謝我的同學(xué)們和本專業(yè)的其他老師。他們給了我很多的建議和幫助。尤其在程序的編寫方面，給了我很大的幫助。特此感謝！通過本次設(shè)計，讓我明白了很多。最重要的是一個人如果無法獨立完成一件事情，那么，同學(xué)和朋友就是你的依靠。再次感謝在設(shè)計中給我?guī)椭睦蠋熀屯瑢W(xué)！附錄A 外文翻譯AT89C2051 Date SheetDescriptionThe AT89C2051 is a lowpower， highperformance CMOS 8bit microcontroller with 8Kbytes of insystem programmable Flash memory. The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard 80C51 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with insystem programmable Flash on a monolithic chip， the Atmel AT89C2051 is a powerful microcontroller which provides a highlyflexible and costeffective solution to many embedded control applications.The AT89C2051 provides the following standard features: 8K bytes of Flash， 256 bytes of RAM， 32 I/O lines， Watchdog timer， two data pointers， three 16bit timer/counters， a sixvector twolevel interrupt architecture， a full duplex serial port， onchip oscillator， and clock circuitry. In addition， the AT89C2051 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM， timer/counters， serial port， and interrupt system to continue functioning. The Powerdown mode saves the RAM contents but freezes the oscillator， disabling all other chip functions until the next interrupt or hardware reset.VCCSupply voltage.GNDGround.Port 0Port 0 is an 8bit open drain bidirectional I/O port. As an output port， each pin can sink eight TTL inputs. When 1sare written to port 0 pins， the pins can be used as highimpe dance inputs. Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode， P0 has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins， they are pulled high by the internal pullups and can be used as inputs. As inputs， Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition， and can be configured to be the timer/counter 2 external count input () and the timer/counter 2 trigger input ()， respectively， Port 1 also receives the loworder address bytes during Flash programming and verificationPort 2Port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins， they are pulled high by the internal pullups and can be used as inputs. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX @DPTR). In this application， Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX @ RI)， Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins， they are pulled high by the internal pullups and can be used as inputs. As inputs， Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C2051， as shown in the following table. Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO， the RESET HIGH out feature is enabled.ALE/PROGAddress Latch Enable (ALE) is an output pulse for latchin