【正文】
PC PC ? Bch ? valC : valP PC update Update PC PC ? valC PC update Set PC to destination PC ? valM PC update Set PC to return address int new_pc = [ icode == ICALL : valC。 icode == IJXX amp。amp。 Bch : valC。 icode == IRET : valM。 1 : valP。 ]。 – 23 – Processor SEQ Hardware (Review) ? Stages occur in sequence ? One operation in process at a time Instr uctionm em or yInstr uctionm em or yPCincrem entPCincrem entCCCC A LUA LUD atam em or yD atam em or yNe wPCrBdstE dstMALUAALUBM em .con tr olAdd rsrcA srcBr e a dw r i t eALUf un .Fet chDecodeExecuteM em oryW ri t e backd a t a o u tR egisterfileR egisterfileA BMEBchdstE dstM srcA srcBi cod e i f un rAPCv al C v al Pv al Bv al ADa tav al Ev al MPCne w PC– 24 – Processor Instruct ionm em oryInstruct ionm em oryPCinc rem entPCinc rem entCCCCA LUA LUDatam em oryDatam em oryPCrBdst E dst MALUAALUBM em .c ont rolAddrsrcA srcBr e a dw r i teALUf un.Fet chDeco deExec ut eM em or yW r i t e bac kd a ta o u tRegi sterfi leRegi sterfi leA BMEBc hdst E dst M srcA srcBicode if un rApBc h pValM pValC pValPpI c odePCv alC v alPv alBv alADat av alEv alMPCSEQ+ Hardware ? Still sequential implementation ? Reorder PC stage to put at beginning PC Stage ? Task is to select PC for current instruction ? Based on results puted by previous instruction Processor State ? PC is no longer stored in register ? But, can determine PC based on other stored information – 25 – Processor PC Computation Int pc= [ pIcode == ICALL : pValC。 pIcode == IJXX amp。amp。 bBch : pValC。 PIcode == IRET : pValM。 1 : pValP。 ]。 – 26 – Processor SEQ Summary Implementation ? Express every instruction as series of simple steps ? Follow same general flow for each instruction type ? Assemble registers, memories, predesigned binational blocks ? Connect with control logic Limitations ? Too slow to be practical ? In one cycle, must propagate through instruction memory, register file, ALU, and data memory ? Would need to run clock very slowly ? Hardware units only active for fraction of clock cycle