【正文】 with programmable interconnections. 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed Selected Key Terms FPGA Design flow Schematic entry Text entry Boundary scan Field programmable gate array。 a programmable logic device that uses the LUT as the basic logic element and generally employs either the antifuse or SRAMbased process technology The process or sequence carried out to program a target device. A method of placing a logic design into software using schematic symbols. A method of placing a logic design into software using a hardware description language (HDL). A method for internally testing a PLD based on the JTAG standard (IEEE Std. ). 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 169。 2022 Pearson Education 1. An advantage of PLDs over discrete circuits is a. lower power and space requirements b. higher reliability c. design flexibility d. all of the above 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 169。 2022 Pearson Education BBAAX2. The logic expression for X is a. X = B(A + B) b. X = B + AB c. X = B + AB d. X = B(A + B) 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 3. Generic Array Logic (GAL) a. is reprogrammable b. uses lookup tables for binational logic c. uses SRAM technology d. all of the above 169。 2022 Pearson Education 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 4. A general block of a CPLD is shown. The center (unmarked) block represents a a. configurable logic block (CLB) b. programmable interconnect array (PIA) c. parator d. lookup table (LUT) 169。 2022 Pearson Education I/O I/OI/O I/OI/O I/OL o g i c a r r a yb l o ck ( L A B )S P L DL o g i c a r r a yb l o ck ( L A B )S P L DL o g i c a r r a yb l o ck ( L A B )S P L DL o g i c a r r a yb l o ck ( L A B )S P L DL o g i c a r r a yb l o ck ( L A B )S P L DL o g i c a r r a yb l o ck ( L A B )S P L D169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 5. The diagram represents a. a PIA b. an FPGA c. a logic module d. a macrocell 169。 2022 Pearson Education 1 5 e xp a n d e rp r o d u ct t e r m s3 6 l i n e s f r o m P I AS h a r e de xp a n d e rP a r a l l e l e xp a n d e r sf r o m o t h e rm a cr o ce l l sA sso ci a t e dl o g i cT o I / Oco n t r o lb l o ckP r o d u ct t e r mse l e ct i o nm a t r i x169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 6. A programmable device that uses a LUT to generate logic is a. a PAL b. a GAL c. an FPGA d. a CPLD 169。 2022 Pearson Education 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 7. The drawings represent two types of a. expanders b. macrocells c. logic array blocks d. sequential logic blocks 169。 2022 Pearson Education 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 169。 2022 Pearson Education 8. VHDL is a a. type of FPGA b. system programming language c. development software d. hardware description language (HDL) 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 9. A written description of all of the ponents and connections in a circuit is called a a. list b. lookup table c. logic array list d. simulation table 169。 2022 Pearson Education 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed 10. An statement in VHDL is: QNot = not B or not Q。. The = characters cause a. variable on the left to be plemented b. expression on the right to be assigned to the variable on the left c. variable on the left to be assigned the smaller of two values d. constant on the left to be assigned to the expression on the right 169。 2022 Pearson Education 169。 2022 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved Floyd, Digital Fundamentals, 10th ed Answers: 1. a 2. c 3. a 4. b 5. d 6. c 7. b 8. d 9. a 10. b