【導(dǎo)讀】在本章中，我們研究了8051的片上定時器。常用于微處理器或微控制器的計時器。一個系列的定時器被劃分為兩個觸發(fā)器，觸發(fā)器的接收輸入信號作為時鐘源。時鐘頻率除以2的時鐘被應(yīng)用于第一個觸發(fā)器。最后一個階段的輸出時鐘觸發(fā)器，定時器溢出或者標(biāo)記都是由軟件測試。從定時器啟動后，定時觸發(fā)器的二進(jìn)制值可以被看作是一個“數(shù)量”。出標(biāo)志設(shè)置的計數(shù)值為FFFFH-0000H溢出。十進(jìn)制計數(shù)顯示，并且很容易通過檢查核實三個觸發(fā)器是否過時。定時器是以幾乎所有的控制為導(dǎo)向的應(yīng)用，8051定時器也不例外。第三個16位定時器的三種操作模式是增加8052。使用該標(biāo)志是同步方案的執(zhí)行，如檢查輸入狀態(tài)或的數(shù)據(jù)發(fā)送到。事件計數(shù)器是用來確定事件的發(fā)生次數(shù)，而來衡量事件之間所經(jīng)過的時間。8051定時器使用6個特殊功能寄存。另外5個SFR提供訪問在8052第三定時器上。它們被用來檢測并。這些較低的4位討論被推遲到第6章，討論中斷。外部時鐘源是通過端口3引腳的復(fù)用功能的方式實現(xiàn)的。

　　

【正文】 timer overflow flags, TFx. The two possibilities for clocking the timers are shown in Figure 43. We now demonstrate how to start stop, and control the timers. The simplest method for starting and stopping the timers it with the run control bit ,TRx, in TCON. TRx is clear after a system reset, thus, the timers are disabled (stopped) by default .TRx is set by software to start the timers (See Figure 44 ). Since TRx is in the bitaddressable register TCON, it is easy to start and stop the timers within a program. For example ,Timer 0 is started by SETB TR0 and stopped by CLR TR0 The assembler will perform the necessary symbolic conversion from TRO to the correct bit address. SETB TR0 is exactly the same as SETB 8 CH. Another method for controlling the timers is with the GATE bit in TMOD and the external input XINT . Setting GATE= 1 allows the timer to be controlled by XINT . This is useful for pulse width measurements as follows. Assume 0INT is low but pulses high for a period of time to be measured. Initialize Timer 0 for mode 2,16bit timer mode, with TL0/TH0 =0000H, GATE=1, and TRO=1. When 0INT goes high, the timer is gated on and is clocked at a rate of 1 MHz. When 0INT goes low, the timer is gated off and the duration of the pulse in microseconds is the count in TL0/TH0,( 0INT can be programmed to generate an interrupt when it returns low.) To plete The picture, Figure 45 illustrates. Timer 1 operating in mode 1 as a 16bit timer . As well as the timer registers TL1/TH1 and the overflow flag TF1, the diagram shows the possibilities for the clocking source and for starting, stopping, and controlling the timer. INITIALIZING AND ACCESSING TIMER REGISTERS The timers are usually initialized once at the beginning of a program to set the correct operating mode. Thereafter, within the body of a program, the timers are started, stopped, flag bits tested and cleared, timer registers read or updated, and so on. as required in the application. TMOD is the first register initialized. Since it sets the mode of operation . For example, the following instruction initializes Timer 1 as a 16bit timer (mode 1) clocked by the onchip oscillator (interval timing): MOV TMOD00010000B The effect of this instruction is to set M1= 0 and M0=1 for mode1, leave TC = 0 and GATE=0 for internal clocking, and clear the Timer 0 mode bits (See Table 42). Of course, the timer does not actually begin timing until its run control bit. TR1 is set. If an initial count is necessary, the timer registers TL1/TH1 must also be initialized. Remembering that the timers count up and set the overflow flag on an FFFFHto0000H transition ,a 100 us interval could be timed by initializing TL1/TH1 to 100 counts less than 0000H .The correct value is 100 or FF9CH. The following instructions do the job: MOV TL1, 9CH MOV TH1, 0FFH The timer is then started by selling the run control bit as follows: SETB TR 1 Reading a Timer On the Fly In some applications, it is necessary to read the value in the timer registers on the fly. There is a potential problem that is simple to guard against in software. Since two timer registers must be read, a phase error39。39。 may occur if the lowbyte overflows into the highbyte between the two read operations. A value may be read that never existed. The solution is to read the highbyte first, then the lowbyte, and then read the highbyte again. If the highbyte has changed, repeat the read operations. The instructions below read the contents of the timer registers TL1/TH1 into registers R6/R7, correctly dealing with this problem. AGAIN: MOV A, THl MOV R6, TL1 CJNE A , THl, AGAIN MOV R7, A