【導(dǎo)讀】單片機(jī)是指一個(gè)集成在一塊芯片上的完整計(jì)算機(jī)系統(tǒng)。盡管他的大部分功。內(nèi)存、內(nèi)部和外部總線系統(tǒng)，目前大部分還會(huì)具有外存。同時(shí)集成諸如通訊接口、定時(shí)器，實(shí)時(shí)時(shí)鐘等外圍設(shè)備。而現(xiàn)在最強(qiáng)大的單片機(jī)系統(tǒng)甚至可以將聲音、圖。單片機(jī)由芯片內(nèi)僅有CPU的專用處理器發(fā)展而來(lái)。最早的設(shè)計(jì)理念是通。復(fù)雜的而對(duì)提及要求嚴(yán)格的控制設(shè)備當(dāng)中。INTEL的Z80是最早按照這種思想設(shè)。計(jì)出的處理器，從此以后，單片機(jī)和專用處理器的發(fā)展便分道揚(yáng)鑣。早期的單片機(jī)都是8位或4位的。其中最成功的是INTEL的8031，因?yàn)楹?jiǎn)。單可靠而性能不錯(cuò)獲得了很大的好評(píng)。基于這一系統(tǒng)的單片機(jī)系統(tǒng)直到現(xiàn)在還在廣泛使用。隨著工業(yè)控制領(lǐng)域。位單片機(jī)的高端地位，并且進(jìn)入主流市場(chǎng)。目前，高端的32位單片機(jī)主頻。8051單片機(jī)由運(yùn)算器、控制器、寄存器等組成。運(yùn)算器以完成二進(jìn)制的算。范圍內(nèi)使用內(nèi)部ROM，大于0FFFH后，單片機(jī)CPU自動(dòng)訪問外部程序存儲(chǔ)器。片機(jī)的數(shù)據(jù)存儲(chǔ)器由讀寫存儲(chǔ)器RAM組成。

　　

【正文】 er of actual operation is not easy to understand? Why should we use several other addressable way This is because it is very difficult in the preparation of procedures immediately give operand. Such as using singlechip control of temperature, from time to time required to control a given temperature (such as 20 ) minus the ambient temperature, and ambient temperature has changed from time to time, apparently unable to give orders in the proceedings only through the way must be into an input / output port, and then stored in a register, which must be used for addressable register. Another example is to carry out arithmetic operations, various participants in each class to calculate the average score, if each student put the sections are made of a procedure, in the proceedings directly give the students grade subjects, and then for the average, it is clear too much trouble. Here can be made for an average grade of a mon procedure, put each participant39。s score into the various memory units, may be take n at this time directly addressing, a program for each student to use, not easier. Therefore, addressing the more programming more convenient and flexible, the scope of application of the more broad, addressing like to find people, such as people have been looking for cell phone, BP machine, landline phone, etc. Contacts are easy to find on He, singlechip microputer is also the case, addressing the more operands to find more convenient, singlechip functions of the stronger. In front of 51 family MCU introduce addressable manner, often encounter a number of internal singlechip registers, accumulator A, generalpurpose registers R0 ~ R7, data pointer DPTR and the memory and so on. Introduction at a later instruction, the data is necessary in these registers, memory between the transmission, or conduct operations. Therefore, the establishment of procedures would need to be familiar with the internal structure of SCM. 8051 within the overall structure of its basic characteristics: 8bit CPU, chip oscillator. 4k byte ROM, 128 bytes RAM, 21 special function registers, 32 I / O lines addressable 64k bytes external data, the program storage space, two 16bit timers, counters, interrupt structure: with Priority 2, the five interrupt sources .A full dualport serial addressing (you can search the contents of a) function, suitable for logic operations carried out by the bit processor. In addition to 128byte RAM, 4k byte ROM and interruption, serial port and timer modules, there are 4 group I / O port P0 ~ P3, the remaining ponent is the CPU all. Put 4kROM for 8751 for the EPROM is the structure, such as removal of ROM / EPROM part of the diagram is 8031, if the ROM replacement for Flash memory or EEPROM, or resave some I / O, you get 51 series derived species, such as 89C51, AT89C2051 MCU block diagram, etc.. Single chip are all parts of the bus through an internal anically linking. AT89C51 singlechip performance talk about the following introduction. AT89C51 is a flicker with 4K byte erasable programmable readonly memory (FPEROMFalsh Programmable and Erasable Read Only Memory) of lowvoltage, highperformance CMOS8 bit microprocessor, monly known as singlechip microputer. The device ATMEL manufacture highdensity nonvolatile memory technology with industrystandard MCS51 Instruction set and output pin patible. Because of the multipurpose 8bit CPU and flash memory chips in a single portfolio, ATMEL The AT89C51 is a highperformance microcontrollers, for a lot of embedded control system provides a flexible and inexpensive program. Main features: with the MCS51 patible, 4K bytes Programmable Flash Memory, Life expectancy: 1000 Writing / wipe cycle .. data retention time: 10 years. wholly static job: 0Hz24Hz. Threetier program memory lock. 128 * 8bit internal RAM. 32 programmable I / O line. Two 16bit timer / counter interrupt sources .5. Programmable serial channel. Lowpower idle and powerdown mode.?chip oscillator and clock circuitry. Pin Description: VCC: power supply voltage. GND: Ground. P0 port: P0 mouth for a grade 8 opendrain bidirectional I / O port, each pin can absorb current 8TTL door. P1 pin when I first Writing 1, is defined as the high impedance input. P0 can be used for external program data memory, which can be defined as data / address bit eight. At FIASH programming, P0 port input as the original code, when FIASH to check when, P0 output of the original code, this time outside P0 must be pushed. P1 port: P1 port are provided on an internal pullup resistor of 8 bidirectional I / O port, P1 mouth to receive the output buffer current 4TTL door. P1 pin I write one, she was an internal pullhigh, can be used as input, P1 I was an external pulldown low when the output current, which is up because of internal reasons la. FLASH programming and calibration at the time, P1 mouth as eightbit address to receive. P2 port: P2 mouth to an internal pullup resistor on the 8bit bidirectional I / O port, P2 I can receive buffers, the output current of 4 TTL door, when I was P2 Writing 1, the pin was on the internal push pullup resistor, and as an input. And therefore as a type, P2 pin I was driving down the outside to output current. This is up because of internal reasons la. P2 mouth when used in external program memory or 16bit address of the external data memory access time, P2 port output address high eight. Give the address at 1, it is the use of internal pulladvantage, when eight addresses on the external data memory read and write when, P2 I output the contents of special function registers. P2 mouth at FLASH programming and calibration receive high eight address signals and control signals. P3 mouth: P3 mouth are 8pin with internal pullup resistor on the bidirectional I / O port to receive the output curren