【文章內(nèi)容簡介】 uency depends on two variables the referenceclock frequency and the binary number programmed into the frequency register tuning word The binary number in the frequency register provides the main input to the phase accumulator If a sine lookup table is used the phase accumulator putes a phase angle address for the lookup table which outputs the digital value of amplitudecorresponding to the sine of that phase angleto the DAC The DAC in turn converts that number to a corresponding value of analog voltage or current To generate a fixedfrequency sine wave a constant value the phase incrementwhich is determined by the binary number is added to the phase accumulator with each clock cycle If the phase increment is large the phase accumulator will step quickly through the sine lookup table and thus generate a high frequency sine wave If the phase increment is small the phase accumulator will take many more steps accordingly generating a slower waveform What do you mean by a plete DDS The integration of a DA converter and a DDS onto a single chip is monly known as a plete DDS solution a property mon to all DDS devices from ADI Lets talk some more about the phase accumulator How does it work Continuoustime sinusoidal signals have a repetitive angular phase range of 0 to 2 The digital implementation is no different The counters carry function allows the phase accumulator to act as a phase wheel in the DDS implementation To understand this basic function visualize the sinewave oscillation as a vector rotating around a phase circle see Figure 4 Each designated point on the phase wheel corresponds to the equivalent point on a cycle of a sine wave As the vector rotates around the wheel visualize that the sine of the angle generates a corresponding output sine wave One revolution of the vector around the phase wheel at a constant speed results in one plete cycle of the output sine wave The phase accumulator provides the equally spaced angular values acpanying the vectors linear rotation around the phase wheel The contents of the phase accumulator correspond to the points on the cycle of the output sine wave The phase accumulator is actually a moduloM counter that increments its stored number each time it receives a clock pulse The magnitude of the increment is determined by the binarycoded input word M This word forms the phase step size between referenceclock updates it effectively sets how many points to skip around the phase wheel The larger the jump size the faster the phase accumulator overfows and pletes its equivalent of a sinewave cycle The number of discrete phase points contained in the wheel is determined by the resolution of the phase accumulator n which determines the tuning resolution of the DDS For an n 28bit phase accumulator an M value of 00000001 would result in the phase accumulator overfowing after 228 referenceclock cycles increments If the M value is changed to 01111111 the phase accumulator will overfow after only 2 referenceclock cycles the minimum required by Nyquist This relationship is found in the basic tuning equation for DDS architecture where fOUT output frequency of the DDS M binary tuning word fC internal reference clock frequency system clock n length of the phase accumulator in bits Changes to the value of M result in immediate and phasecontinuous changes in the output frequency No loop settling time is incurred as in the case of a phaselocked loop As the output frequency is increased the number of samples per cycle decreases Since sampling theory dictates that at least two samples per cycle are required to reconstruct the output waveform the imum fundamental output frequency of a DDS is fC2 However for practical applications the output frequency is limited to somewhat less than that improving the quality of the reconstructed waveform and permitting fltering on the output When generating a constant frequency the output of the phase accumulator increases linearly so the analog waveform it generates is inherently a ramp Then how is that linear output translated into a sine wave A phasetoamplitude lookup table is used to convert the phaseaccumulators instantaneous output value 28 bits for AD9833 with unneeded lesssignifcant bits eliminated by truncationinto the sinewave amplitude information that is presented to the 10bit DA converter The DDS architecture exploits the symmetrical nature of a sine wave and utilizes mapping logic to synthesize a plete sine wave from onequartercycle of data from the phase accumulator The phaseto amplitude lookup table generates the remaining data by reading forward then back through the lookup table This is shown pictorially in Figure 5 What are popular uses for DDS Applications currently using DDSbased waveform generation fall into two principal categories Designers of munications systems requiring agile ie immediately responding frequency sources with excellent phase noise and low spurious performance often choose DDS for its bination of spectral performance and frequencytuning resolution Such applications include using a DDS for modulation as a reference for a PLL to enhance overall frequency tunability as a local oscillator LO or even for direct RF transmission Alternatively many industrial and biomedical applications use a DDS as a programmable waveform generator Because a DDS is digitally programmable the phase and frequency of a waveform can be easily adjusted without the need to ch