【文章內(nèi)容簡介】 又有人按下下降按鈕（Button(3)=1），此時電梯在一層做短暫停留后再次回到三層，三層使用者進入后按下到達一層按鈕（floor(0)=1），電梯再次回到一層。通過六次仿真可以看出系統(tǒng)基本完成了設(shè)計要求。實驗難點和創(chuàng)新本實驗狀態(tài)較為復雜，狀態(tài)中嵌套狀態(tài)，狀態(tài)圖的繪制比較困難。本實驗使用的狀態(tài)圖考慮了不同狀態(tài)轉(zhuǎn)移過程中的所有情況。外部請求按鍵較多，電梯在上升過程中只能響應(yīng)高于其當前所在樓層的請求，反之在下降過程中只能響應(yīng)低于其當前所在樓層的請求。而且系統(tǒng)要求記憶目前沒有被響應(yīng)的請求。圖45和圖46對此功能進行了仿真。本系統(tǒng)的設(shè)計考慮了實際應(yīng)用中的記憶存貯問題。使用者在電梯內(nèi)外提出的請求不一致，例如圖45中進行仿真的情況。使用者本來是要下樓，但在電梯外卻按下上樓按鈕。對于這種情況，系統(tǒng)認定使用者進入電梯后提出的請求為最終請求。第5章　結(jié)論與展望 結(jié)論通過以上設(shè)計調(diào)試和改進并通過較長時間的反復測試?？梢愿鶕?jù)要求打印出各項指標參數(shù)和曲線圖及仿真圖，且重復一次性好。用VHDL硬件描述語言的形式進行數(shù)字系統(tǒng)的設(shè)計方便靈活，利用EDA軟件進行編譯優(yōu)化仿真極大地減少了電路設(shè)計時間和可能發(fā)生的錯誤。降低了開發(fā)成本，這中設(shè)計方法必將在未來的數(shù)字系統(tǒng)設(shè)計中發(fā)揮越來越重的作用。本設(shè)計采用的正式FPGA來控制電梯的邏輯運行，具有編程靈活，性能可靠等優(yōu)點，而且FPGA在去電后配置數(shù)據(jù)自動消失，用戶可以控制加載進程，在現(xiàn)場修改器件的邏輯功能。在設(shè)計過程中我們首先把整個電梯設(shè)計根據(jù)功能分成若干個功能模塊，然后理清個模塊的時序，一以便將各個功能模塊綜合在一起,能夠公用書籍總線，使其能正常工作不受干擾，有些程序在仿真的時候其時序是完全正確的，但是當程序下載到芯片上之后就會發(fā)現(xiàn)錯誤了。這主要是因為各個功能在實現(xiàn)時會有延時，但這在仿真時是顯示不出來的。因此編程時要注意在選芯片之前，要先將計算出的數(shù)據(jù)信號先放到數(shù)據(jù)總線上。FPGA在實現(xiàn)電梯控制方面比較靈活，可以通過對程序的修改來達到控制多個樓層，本設(shè)計在電梯控制方面做的比較全面，比如設(shè)計了內(nèi)外電梯的指示系統(tǒng)和當前電梯運行情況顯示，能夠滿足一般的載客電梯的工作功能需要。 展望三層電梯廣泛應(yīng)用在大型的貨運之中。其使用便捷，貨運周期短，效率高，成本低，對貨運事業(yè)具有普相當?shù)慕?jīng)濟價值。在客運上，三層電梯雖然涉及樓層不高，應(yīng)用范圍不大，但就特殊而言，可以為一些上下樓層不方便的人們提供相當?shù)膸椭?，照顧了這些特殊群體的感情。因此，在某些層面上說，三層電梯的設(shè)計也具有一定的社會價值。致 謝本次畢業(yè)設(shè)計能夠順利完成，是指導老師、在設(shè)計過程中幫助我們的同學、我的搭檔和我共同努力的結(jié)果，在這里我對老師、一起努力的同學和我的搭檔表示真誠的感謝！隨著畢業(yè)設(shè)計的完成，自己四年的大學生活也接近了尾聲，在這四年難忘的歲月中，留下許多美好的回憶，尤其是最后的畢業(yè)設(shè)計，更是令我記憶深刻。首先，我要感謝我們的學校，感謝在這四年中教給我許多做人做事的道理，讓我從一個懵懂得高中生變成一個能被社會所接納的知識青年；其次，我要特別的感謝一下我們的指導老師，是她在我撰寫畢業(yè)論文過程中給了我無私的幫助，從當初選題到中期答辯，再到最后定稿，老師多次詢問我們設(shè)計進程中所遇到的難題，并及時為我指點迷津。再次，我要感謝那些曾經(jīng)教我們的老師們，是他們教會了這些知識和本領(lǐng)，才能在這次設(shè)計中得以運用。當然，我還要感謝寢室的兄弟們和其它同學，是他們在我完成論文的過程中給予我?guī)椭凸膭?，也是他們陪我度過了這四年最美好的生活?，F(xiàn)在我即將揮別自己的大學生活，萬千感慨上心頭，有對校園和同學戀戀不舍，更有對美好未來的憧憬。最后，再次感謝我的老師、同學和大學期間所有的朋友們，是你們?yōu)槲业拇髮W生活增光添色，讓它變得五彩斑駁，尤為難忘。真誠的說一聲：“謝謝你們！”參考文獻[1]毛宗源等，微機控制電梯[M]，國防工業(yè)出版社出版，1996[2]李鼎培，當前電梯研制開發(fā)技術(shù)動態(tài)[J]，中國電梯，1995[3]梁延東主編。電梯控制技術(shù)[M]。中國建筑工業(yè)出版社，1997[4]張漢杰，王錫鐘編著?，F(xiàn)代電梯控制技術(shù)[M]。哈爾濱工業(yè)大學出版社，1996[5]Kim C B，Kyoung A．seong，et a1．A fuuzzy aproach to elevator group controlsystem．IEEE Trans Syst[D]．Man，Cybern．，1995，25[6]SIEMENS公司編著，西門子(中國)有限公司譯[Z]。SIEMATIC S一7 300可編程序控制器硬件和安裝手冊。2001年5月[7]SIEMENS公司編著，西門子(中國)有限公司譯[Z]。SIEMTIC STEP7 V5．0系統(tǒng)手冊。2001年5月[8]武自芳，虞鶴松著。微機控制系統(tǒng)及其應(yīng)用[M]。西安交通大學出版社，1998[9]汪曉光，孫曉瑛等編著?？删幊炭刂破髟砑皯?yīng)用(上／下冊)[M]。機械工業(yè)出版社，2001[10] 溫照方主編。SIMATIC S7—300可編程序控制器教程[M]。北京理工大學出版社，2002 22 附 錄附錄A 外文資料Building Programmable Automation Controllers with LabVIEW FPGAOverviewProgrammable Automation Controllers (PACs) are gaining acceptance within the industrial control market as the ideal solution for applications that require highly integrated analog and digital I/O, floatingpoint processing, and seamless connectivity to multiple processing nodes. National Instruments offers a variety of PAC solutions powered by one mon software development environment, NI LabVIEW. With LabVIEW, you can build custom I/O interfaces for industrial applications using addon software, such as the NI LabVIEW FPGA Module. With the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware, National Instruments delivers an intuitive, accessible solution for incorporating the flexibility and customizability of FPGA technology into industrial PAC systems. You can define the logic embedded in FPGA chips across the family of RIO hardware targets without knowing lowlevel hardware description languages (HDLs) or boardlevel hardware design details, as well as quickly define hardware for ultrahighspeed control, customized timing and synchronization, lowlevel signal processing, and custom I/O with analog, digital, and counters within a single device. You also can integrate your custom NI RIO hardware with image acquisition and analysis, motion control, and industrial protocols, such as CAN and RS232, to rapidly prototype and implement a plete PAC system.Table of ContentsIntroduction NI RIO Hardware for PACs Building PACs with LabVIEW and the LabVIEW FPGA Module FPGA Development Flow Using NI SoftMotion to Create Custom Motion Controllers Applications Conclusion Introduction You can use graphical programming in LabVIEW and the LabVIEW FPGA Module to configure the FPGA (fieldprogrammable gate array) on NI RIO devices. RIO technology, the merging of LabVIEW graphical programming with FPGAs on NI RIO hardware, provides a flexible platform for creating sophisticated measurement and control systems that you could previously create only with customdesigned hardware.An FPGA is a chip that consists of many unconfigured logic gates. Unlike the fixed, vendordefined functionality of an ASIC (applicationspecific integrated circuit) chip, you can configure and reconfigure the logic on FPGAs for your specific application. FPGAs are used in applications where either the cost of developing and fabricating an ASIC is prohibitive, or the hardware must be reconfigured after being placed into service. The flexible, softwareprogrammable architecture of FPGAs offer benefits such as highperformance execution of custom algorithms, precise timing and synchronization, rapid decision making, and simultaneous execution of parallel tasks. Today, FPGAs appear in such devices as instruments, consumer electronics, automobiles, aircraft, copy machines, and applicationspecific puter hardware. While FPGAs are often used in industrial control products, FPGA functionality has not previously been made accessible to industrial control engineers. Defining FPGAs has historically required expertise using HDL programming or plex design tools used more by hardware design engineers than by control engineers.With the LabVIEW FPGA Module and NI RIO hardware, you now can use LabVIEW, a highlevel graphical development environment designed specifically for measurement and control applications, to create PACs that have the customization, flexibility, and highperformance of FPGAs. Because the LabVIEW FPGA Module configures custom circuitry in hardware, your system can process and generate synchronized analog and digital signals rapidly and deterministically. Figure 1 illustrates many of the NI RIO devices that you can configure using the LabVIEW FPGA Module.NI RIO Hardware for PACs H