【正文】 核心，所有外設都是存儲器映射。它 們使用清楚的記錄。 Example Switch Statement via Manual PC Control Mov value,R15 。最常見的程序是推動寄存器到堆棧在 ISR 的開始， 并在 ISR 的結束是 彈出。 1=允許中斷 0=不允許中斷 ? CPU 控制位（ CPUOff） 位： 4 功能：是否允許 CPU 進入關閉模式 ，可通過軟件清除 和恢復中斷 。 PUSH 命令 將 SP在 RAM 向下移動 一個字符 （ SP= SP 2），并將 數(shù)值放在新的 SP。 地點為 0000H 和 0001h 包含中斷 能 力 ， 和位置 0002h 和 0003h 包含中斷標志。 引導存儲器（ 只有 閃存器件） 引導存儲器只在 閃存器件中實現(xiàn)，在存儲器中 位于地 址 0C00h 到 0FFFh。 ROM ROM 設備，也被稱為 帶掩模的 設備，是由 部分號碼中的 字母 “C” 確定 。它們不是用于生產(chǎn)使用，但 在發(fā)展中為仿真 ROM 設備取得 理想平臺為。他們 也需要編程，這可能在大量生產(chǎn) 環(huán)境 中是一個障礙 。所有代碼，表和 硬空格字符 的常數(shù)在這個 存儲 空間。 RAM 共享是很常見的錯誤，并且 很難找出 。 堆棧侵 占 。你會看到這本書 中常常提到這些標志 ，因為它們的功能代表一個基本組成部分。 7 個 最重要的位是不確定的。在這個例子中，我們檢查有效范圍以外的兩端的條件。一代基于 W(S)中有一定的應用價值 ,并描述指令字由下列表格。為了效率目的任何經(jīng)常使用的變量需要存放在這些地址之一。 第二，有大量的工作寄存器。4xx裝置 。 我 假定讀者對微控制器基礎設計無論是專業(yè)或學術上有一定的經(jīng)驗。put the switch value into R15 Cmp R15,8 。1xx, 39。PC goes to proper jump Jmp value0 Jmp value1 Jmp value2 Jmp value3 Jmp value4 Jmp value5 Jmp value6 Jmp value7 Outofrange Jmp RangeError This is a relatively mon approach, and most C pilers will implement switch statements with something similar. When implementing this manually (., in assembly language), the programmer needs to keep several things in mind: Always do proper range checking. In the example, we checked for conditions outside both ends of the valid range. If this is not performed correctly, the code can jump to an unintended location. Pay close attention to the addressing modes of the jump statements. The second doubling of R15, prior to the add statement, is added because the jump statement requires two words when symbolic mode addressing is used. Be careful that none of your interrupt handlers have the potential to affect your value register (R15 in the example). If the interrupt handler needs to use one of these registers, the handler needs to store the value to RAM first. The most mon procedure is to push the register to the stack at the beginning of the ISR, and to pop the register at the end of the ISR. (See Example .) Example Push/Pop Combination in ISR Timer_A_Hi_Interrupt Push R12 。 該 39。 結構： CPU 和內存 正如在第一章中所討論的， MSP430 的采用 16位 RISC 結構，這是在任何字節(jié)或字的處理指令的能力。 CPU的特點 ALU 該 39。 我在八個月前寫的代碼，廣泛的在R R9 和 R15 上執(zhí)行操作。put the switch value into R15 Cmp R15,8 。（見例 ）。 存儲器，外設和定時器都不被此位影響，此位作為一個節(jié)電功能 。 彈出相反。 這些都是描述 在第 3 章。它是 閃存器件 唯一的硬 空格字符 的 ROM 空間。他們是嚴格的 ROM 設備，運算 編程。 FLASH FLASH 設備 是由 部分號碼中的 字母 “F ” 確定的 ， 在過去數(shù)年非常流行 。他們通常比 ROM 更加昂貴。因此，對于 8K 的設備，代碼運行從 0E000h 到 0FFFFH， 6 萬的設備，代碼運行 從 01100h 到 0FFFFH。為 RAM 使用的一些經(jīng) 驗法則： 開發(fā)者 需要謹慎，暫存器分配和堆棧的使用并不侵犯對方，或全局變量。如果彈出一個空棧， SP 遷出 內存，并且程序將失敗。 1=結果發(fā)生溢出 0=結果沒發(fā)生溢出 其中四個標志（溢出，負， 進位 和零）驅動程序控制，通過指令，如 cmp（比較）和JZ（如果零標志集 跳躍 ）。這些標志都是直接通過 代 碼訪問，并且 6 其中只有 3 個是 處理器本身自動 更改 的 。在實施這一 做法 （即 匯編語言），程序員需要 記錄一些東西 ： 永遠做適當范圍的檢查。 )包括一些常見的 singlebit 產(chǎn)生常量值 (0001h,0002h,0004h,0008h)、零 (0000h),它的所有領域 0FFFFh(1)。他們使用的一些準則： 盡可能使用這些寄存器。幾乎一半的狀態(tài)寄存器仍然可以為未來的發(fā)展，大致外設寄存器空間的一半是未使用的，只有 6 位 16 位可用的特殊功能寄存器使用。3xx 和 39。430 family have the added feature of information memory. This information memory acts as onboard EEPROM, allowing critical variables to be preserved through power down. It is divided into two 128byte segments. The first of these segments is located at addresses 01000h through 0107Fh, and the second is at 01080h through 010FFh. Code Memory Code memory is always contiguous at the end of the address space (. always runs to location 0FFFFh). So, for 8k devices, code runs from 0E000h to 0FFFFh, and for the 60k devices, the code runs from 01100h to 0FFFFh. All code, tables, and hardcoded constants reside in this memory space. Interrupt Vectors Interrupt vectors are located at the very end of memory space, in locations 0FFE0h through 0FFFEh. Programming and use of these are described in detail in Chapter 3. Memory Types The MSP430 is available with any one of several different memory types. The memory type is identified by the letter immediately following MSP430 in the part numbers. (Example: All MSP430Fxxx parts are flash decices). ROM 1 ROM devices, also known as masked devices, are identified by the letter C in the part numbers. They are strict ROM devices, shipped preprogrammed. They have the advantage of being very inexpensive, and may be the best solution for highvolume designs. However, due to high NRE (nonrecurring engineering) costs, masked ROM is only costefficient when hundreds of thousands (or more) devices are required. They should also only be used for stable designs. If bugs are found too late in the process, the NRE costs have the potential to be repeated. OTP OTP is an acronym for one time programmable, which pretty well describes the functionality of these devices. Identified by the letter P in the part number, OTP parts are a good promise between ROM and flash parts. OTPs are shipped blank, and can be programmed at any time. They are typically more expensive than ROM. They also require programming, which can be a hindrance in highvolume manufacturing environments. However, OTPs are ideal for low and medium volume applications, and can be a useful intermediate step when you are still uncertain about the stability of the design. EPROM TI offers windowed EPROM versions of several devices, intended for use in development. They are identified by the letter E in the part number. These devices are electrically programmable, and UVerasable. EPROM devices are only available for a few devices, and typically cost on the order of $50 each. They are not intended for production use, but make id