【正文】 電平，*為高或低電平）0000000000一段式最長(zhǎng)60秒錄放音，從首地址開始。ISD器件可進(jìn)行多段地址操作，每一段稱為一個(gè)信息段，它可以占用一行和多行存儲(chǔ)空間。通常情況下，只能使用ISD器件提供的無(wú)須知道地址的操作模式，即手動(dòng)模式，這只適合于開發(fā)一些簡(jiǎn)單的語(yǔ)音功能，而無(wú)法滿足復(fù)雜操作或者實(shí)時(shí)中應(yīng)用的要求。單片機(jī)需要完成以下兩個(gè)功能：l 通過ISD2560芯片，錄制一段語(yǔ)音信息l 利用單片機(jī)定時(shí)10秒，循環(huán)播放一段錄制的語(yǔ)音本電路采用的主要器件是ISD2560語(yǔ)音芯片和單片機(jī)，具體接口電路如下：e. 電路原理和器件的選擇下面是相關(guān)的、關(guān)鍵部分的器件名稱及起在電路中的功能AT89C2051：主要通過對(duì)ISD2560的設(shè)置，完成對(duì)語(yǔ)音播放過程的控制。l SPEAKER：ISD2560語(yǔ)音芯片外接的揚(yáng)聲器。同樣的方法可以錄取第二段、第三段等。供錄音時(shí)使用。本電路采用第二種方式。送字段4起始地址 CLR CLR LCALL RECORD JMP BACKNEXT4: CJNE R7,5,BACK MOV R7,00H MOV P1,80H 。調(diào)查找播放地址子程 CJNE R0,5,OUT MOV R0,2FHOUT: RETFIND: MOV A,R0 。等待語(yǔ)音段結(jié)束信號(hào)TURN2: JNB ,TURN2 ；等待EOM信號(hào)的上升沿 RET致 謝在兩個(gè)多月的課題研究及論文撰寫過程中，我非常感謝我的導(dǎo)師—張冀祥老師。 8 Kbytes of InSystem Reprogrammable Flash MemoryEndurance: 1,000 Write/Erase Cycles Low Power Idle and Power Down ModesDescriptionThe AT89C52 is a lowpower, highperformance CMOS 8bit microputer with 8 Kbytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high density nonvolatile memory technology and is patible with the industry standard 80C51 and 80C52 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a powerful microputer which provides a highly flexible and cost effective solution to many embedded control applications. The AT89C52 provides the following standard features: 8 Kbytes of Flash, 256 bytes of RAM, 32 I/O lines, three 16bit timer/counters, a sixvector twolevel interrupt architecture, a full duplex serial port, onchip oscillator, and clock circuitry. In addition, the AT89C52 isDescription (Continued)designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next hardware reset.Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition, and can be configured to be the timer/counter 2 external count input () and the timer/counter 2 trigger input (), respectively, as shown in the following table.Port 1 also receives the loworder address bytes during Flashprogramming and program verification.port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some controlsignals during Flash programming and verification.Port 3Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51, as shown in the following table.Port 3 also receives some control signals for Flash programming and programming verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROGAddress Latch Enable is an output pulse for latching the low byte of the ad