基于fpga的等精度數(shù)字頻率計(jì)的設(shè)計(jì)相關(guān)中英對照外文文獻(xiàn)翻譯高質(zhì)量人工翻譯原文帶出處(5)-全文預(yù)覽
【正文】 e of the model is hierarchical, The use of these rich data types and levels of the structure model of a plex digital system logic design and puter simulation, and gradually improve after the automatic generation integrated to meet the requirements of the circuit structure of the digital logic can be realized, then can be downloaded to programmable logic devices, to plete design tasks. from Vin for Programmable Logic page7688 。δTx Here, δ Tx not for the accuracy of the measurement. On the decline of the share: \δTx≤177。 n2 for a short period of time at Δ t2 corresponding delay unit Number。 a word counting error, so as to further enhance accuracy. To measure a short time interval Δ t1 and Δ t2, monly used analog interpolation method with the cursor or more bined cycle synchronization, although accuracy is greatly improved, but eventually failed to resolve 177。 Similarly, when preferences for low gate signal (the end of Preferences time), the rising edge of the measured signals through D Trigger output end of the counter to stop counting. the median frequency of relevant indicators Median: At the same time the figures show that up to the median. The usual eightcount frequency of only several hundred yuan can buy. For high precision measurements, nine just beginning, the middle is 11, 13 can be relatively high. Overflow of:the ability to promote itself to overflow the equivalent of the total. Some of the frequency with overflow function, which is the highest overflow does not display only shows that the bit behind, in order to achieve the purpose of the median. Here is the estimated value of individual indicators. Speed: namely, the number of per second. With the high number of measurement particularly slow but also lose its significance. Counting of the usual eight frequency measurement 10 MHz signals, one second gate will be 10000000 Hz, which is actually seven (equivalent to the median number of mon admission after the value), to obtain eight needed 10 seconds gate 。 譯自文斯凱赫爾著的 VHDL 邏輯設(shè)計(jì) 7688 頁 Introduction of digital frequency meter Digital Frequency of munications equipment, audio and video, and other areas of scientific research and production of an indispensable instrument. Programming using Verilog HDL Design and Implementation of the digital frequency, in addition to the plastic part of the measured signal, and digital key for a part of the show, all in an FPGA chip to achieve. The entire system is very lean, flexible and have a modification of the scene. 1. And other precision measuring frequency Principle Frequency measurement methods can be divided into two kinds: (1) direct measurement method, that is, at a certain time measurement gate measured pulse signal number. (2) indirect measurements, such as the cycle frequency measurement, VF conversion law. Frequency Measurement indirect measurement method applies only to lowfrequency signals. Based on the principles of traditional frequency measurement of the frequency of measurement accuracy will be measured with the decline in signal frequency decreases in the more practical limitations, such as the accuracy and frequency of measurement not only has high accuracy, but also in the whole frequency region to maintain constant test accuracy. The main method of measurement frequency measurement Preferences gated signal GATE issued by the MCU, GATE time width on the frequency measurement accuracy of less impact, in the larger context of choice, as long as the FPGA in 32 of 100 in the counter b M Signals are not overflow line, in accordance with the theoretical calculation GATE time can be greater than the width Tc s, but due to the singlechip microputer data processing capacity constraints, the actual width of less time, generally in
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