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0MHz ◆ Package 封裝 ? 332FBGA 。 — 最大緩存結(jié)構(gòu)尺寸是 4M 字節(jié) — 最大有效屏幕尺寸 64K 彩色模式 ◆ 串口 ? 3 通道 UART 是基于 DMA 或者基于中 斷工作方式。 ? 支持 FIQ 中斷模式響應(yīng)緊急 事件 。 MPLL產(chǎn)生的時鐘去提供 MCU工作, 最大 ? 每個功能模塊可通過軟件來選擇時鐘 — 電源模式:正常模式,低速模式,空閑模式和睡眠模式 — 正常模式:正常工作模式 — 低速模式:低時鐘頻率沒有鎖相環(huán) — 空閑模式:只有 CPU時鐘被關(guān)閉 — 關(guān)閉模式:所有的時鐘都關(guān)閉 — 深睡眠模式: ARM 電源關(guān)閉內(nèi)部時鐘停止 — 睡眠模式: Core 電源包括所有外圍是關(guān)閉。三星電子的 SC32442B 是設(shè)計成用于手持式設(shè)備和僅用極小的體積便為手持設(shè)備和一般類型應(yīng)用提供了低功耗、高性能微處理器解決方案 。 MMC Protocol version patible ◆ 2ch USB Host controller / 1ch USB Device controller (ver ) ◆ 4ch PWM timers / 1ch Internal timer / Watch Dog Timer ◆ 8ch 10bit ADC and Touch screen interface ◆ RTC with calendar function ◆ Camera interface (Max. 4096 x 4096 pixels input support. 2048 x 2048 pixel input support for scaling) ◆ 130 General Purpose I/O ports / 24ch external interrupt source 天津工程師范學(xué)院 2020 屆本科生畢業(yè)設(shè)計 2 ◆ Power control: Normal, Slow, Idle, stop and Sleep mode ◆ Onchip clock generator with PLL FEATURES ◆ Architecture ? Integrated system for handheld devices and general embedded applications. ? 16/32Bit RISC architecture and powerful instruction set with ARM920T CPU core. ? Enhanced ARM architecture MMU to support WinCE, EPOC 32 and Linux. ? Instruction cache, data cache, write buffer and Physical address TAG RAM to reduce the effect of main memory bandwidth and latency on performance. ? ARM920T CPU core supports the ARM debug architecture. ? Internal Advanced Microcontroller Bus Architecture (AMBA) (, AHB/APB). ◆ System Manager ? Little/Big Endian support. ? Support Fast bus mode and Asynchronous bus mode. ? Address space: 128M bytes for each bank (total 1G bytes). ? Supports programmable 8/16/32bit data bus width for each bank. ? Fixed bank start address from bank 0 to bank 6. ? Programmable bank start address and bank size for bank 7. ? Eight memory banks:– Six memory banks for ROM, SRAM, – Two memory banks for ROM/SRAM/ Synchronous DRAM. ? Complete Programmable access cycles for all memory banks. ? Supports external wait signals to expand the bus cycle. ? Supports selfrefresh mode in SDRAM for powerdown. ? Supports various types of ROM for booting (NOR/NAND Flash, EEPROM, and others). ◆ NAND Flash Boot Loader ? Supports booting from NAND flash memory. ? 4KB internal buffer for booting. ? Supports storage memory for NAND flash memory after booting. ? Supports Advanced NAND flash ◆ Cache Memory ? 64way setassociative cache with ICache (16KB) and DCache (16KB). ? 8words length per line with one valid bit and two dirty bits per line. ? Pseudo random or round robin replacement algorithm. ? Writethrough or writeback cache operation to update the main memory. ? The write buffer can hold 16 words of data and four addresses. ◆ Clock amp。s SC32442B 16/32bit RISC microprocessor. SAMSUNG’s SC32442B is designed to provide handheld devices and general applications with lowpower, and highperformance microcontroller s